0X430C: External Interrupt Level Setup Register 3 (Itc_Elv3) - Epson S1C17704 Technical Manual

Cmos 16-bit single chip microcomputer
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6 INTERRUPT CONTROLLER (ITC)

0x430c: External Interrupt Level Setup Register 3 (ITC_ELV3)

Register name Address
Bit
External
0x430c
D15–13 –
Interrupt Level
(16 bits)
D12
Setup Register 3
D11
(ITC_ELV3)
D10–8 EILV7[2:0]
D7–5 –
D4
D3
D2–0 EILV6[2:0]
D[15:13] Reserved
D12
EITG7: PWM & Capture Timer Interrupt Trigger Mode Select Bit
Selects the trigger mode of the PWM & capture timer interrupt. Set this bit 1 in the S1C17704.
1 (R/W): Level trigger mode
0 (R/W): Pulse trigger mode (default)
See the description of EITG1 (D12) in the ITC_ELV0 register (0x4306).
D11
Reserved
D[10:8]
EILV7[2:0]: PWM & Capture Timer Interrupt Level Bits
Sets the interrupt level (0 to 7) of the PWM & capture timer interrupt. (Default: 0)
See the description of EILV1[2:0] (D[10:8]) in the ITC_ELV0 register (0x4306).
D[7:5]
Reserved
D4
EITG6: LCD Interrupt Trigger Mode Select Bit
Selects the trigger mode of the LCD interrupt. Set this bit 1 in the S1C17704.
1 (R/W): Level trigger mode
0 (R/W): Pulse trigger mode (default)
See the description of EITG1 (D12) in the ITC_ELV0 register (0x4306).
D3
Reserved
D[2:0]
EILV6[2:0]: LCD Interrupt Level Bits
Sets the interrupt level (0 to 7) of the LCD interrupt. (Default: 0)
See the description of EILV1[2:0] (D[10:8]) in the ITC_ELV0 register (0x4306).
6-20
Name
Function
reserved
EITG7
T16E interrupt trigger mode
reserved
T16E interrupt level
reserved
EITG6
LCD interrupt trigger mode
reserved
LCD interrupt level
Setting
1 Level
0 Pulse
0 to 7
1 Level
0 Pulse
0 to 7
EPSON
Init. R/W
Remarks
0 when being read.
0
R/W Be sure to set to 1.
0 when being read.
0x0 R/W
0 when being read.
0
R/W Be sure to set to 1.
0 when being read.
0x0 R/W
S1C17704 TECHNICAL MANUAL

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