0X4346: I 2 C Interrupt Control Register (I2C_Ictl) - Epson S1C17704 Technical Manual

2
0x4346: I C Interrupt Control Register (I2C_ICTL)
Register name Address Bit
2
I C Interrupt 0x4346 D15–2 –
Control Register (16 bits)
D1
(I2C_ICTL)
D0
D[15:2] Reserved
D1 RINTE: Receive Interrupt Enable Bit
Enables/disables the I
1 (R/W): Enable
0 (R/W): Disable (default)
When RINTE is set to 1, I
buffer full interrupt request occurs when the data received in the shift register is loaded to RTDT[7:0]
(D[7:0]/I2C_DAT register) (receive operation completed).
When RINTE is set to 0, an I
D0 TINTE: Transmit Interrupt Enable Bit
Enables/disables the I
1 (R/W): Enable
0 (R/W): Disable (default)
When TINTE is set to 1, I
buffer empty interrupt request occurs when the data written to RTDT[7:0] (D[7:0]/I2C_DAT register) is
transferred to the shift register.
When TINTE is set to 0, an I
S1C17704 TECHNICAL MANUAL
Name Function
reserved
RINTE Receive interrupt enable
TINTE Transmit interrupt enable
2
C receive buffer full interrupt.
2
C receive buffer full interrupt requests to the ITC are enabled. A receive
2
C receive buffer full interrupt is not generated.
2
C transmit buffer empty interrupt.
2
C transmit buffer empty interrupt requests to the ITC are enabled. A transmit
2
C transmit buffer empty interrupt is not generated.
EPSON
Setting Init. R/W
–
1 Enable 0 Disable
1 Enable 0 Disable
2
20 I C
Remarks
– – 0 when being read.
0 R/W
0 R/W
20-19