X50A2: Lcd Clock Control Register (Lcd_Cctl) - Epson S1C17704 Technical Manual

0x50a2: LCD Clock Control Register (LCD_CCTL)

Register name Address Bit
LCD Clock 0x50a2 D7–2 –
Control Register (8 bits)
D1–0 LDUTY[1:0] LCD duty select
(LCD_CCTL)
D[7:2] Reserved
D[1:0] LDUTY[1:0]: LCD Duty Select Bits
Selects a drive duty.
LDUTY[1:0]
0x3
0x2
0x1
0x0
S1C17704 TECHNICAL MANUAL
Name Function
reserved
Table 22.8.4 Setting the Drive Duty
Duty Effective COM pins
Reserved
1/32 COM0–COM31
1/16 COM0–COM15
Reserved
EPSON
Setting
–
LDUTY[1:0] Duty
0x3 reserved
0x2 1/32
0x1 1/16
0x0 reserved
Effective SEG pins
– –
SEG0–SEG55
SEG0–SEG71
– –
22 LCD DRIVER (LCD)
Init. R/W Remarks
– – 0 when being read.
0x2 R/W
Max number of pixels
–
1,792 pixels
1,152 pixels
–
(Default: 0x2)
22-17