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D1
MSSL: Master/Slave Mode Select Bit
Sets the SPI module in master or slave mode.
1 (R/W): Master mode
0 (R/W): Slave mode (default)
Setting MSSL to 1 selects master mode, and setting to 0 selects slave mode. In master mode, the SPI
performs data transfer using the clock generated by the 16-bit timer Ch.1. In slave mode, the SPI
performs data transfer using a clock input from the master device.
D0
SPEN: SPI Enable Bit
Enables/disables operation of the SPI module.
1 (R/W): Enable
0 (R/W): Disable (default)
When SPEN is set to 1, the SPI module is activated and data transfer is enabled.
When SPEN is set to 0, the SPI module goes off.
Note: Make sure that the SPEN bit is 0 before setting the CPHA, CPOL, and MSSL bits.
S1C17704 TECHNICAL MANUAL
EPSON
19 SPI
19-15
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