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22 LCD DRIVER (LCD)
0x50a1: LCD Contrast Adjust Register (LCD_CADJ)
Register name Address
Bit
LCD Contrast
0x50a1
D7–4 –
Adjust Register
(8 bits)
D3–0 LC[3:0]
(LCD_CADJ)
D[7:4]
Reserved
D[3:0]
LC[3:0]: LCD Contrast Adjustment Bits
Adjusts the LCD contrast. This facility is achieved to control the V
LCD system voltage regulator.
At initial reset, LC[3:0] is set to 0x0. Initialize LC[3:0] with software to set the display to the desired
contrast.
22-16
Name
Function
reserved
LCD contrast adjustment
Table 22.8.3 LCD Contrast Adjustment
LC[3:0]
0xf
0xe
:
0x1
0x0
EPSON
Setting
Init. R/W
–
–
LC[3:0]
Display
0x0 R/W
0xf
Dark
:
:
0x0
Light
to V
voltages output from the
C1
C5
Contrast
High (dark)
↑
:
↓
Low (light)
(Default: 0x0)
S1C17704 TECHNICAL MANUAL
Remarks
–
0 when being read.
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