8-Bit Osc1 Timer Run/Stop Control - Epson S1C17704 Technical Manual

14 8-BIT OSC1 TIMER (T8OSC1)

14.6 8-bit OSC1 Timer Run/Stop Control

Before starting the 8-bit OSC1 timer, set up the conditions as shown below.
(1) Select a count mode (one-shot or repeat). See Section 14.2.
(2) Select the operating clock. See Section 14.3.
(3) Set up the interrupt level and enable the 8-bit OSC1 timer interrupt if the interrupt is used. See Section 14.7.
(4) Reset the timer. See Section 14.4.
(5) Set compare data. See Section 14.5.
The 8-bit OSC1 timer provides T8ORUN (D0/T8OSC1_CTL register) to run and stop the counter.
∗ T8ORUN: Timer Run/Stop Control Bit in the 8-bit OSC1 Timer Control (T8OSC1_CTL) Register (D0/0x50c0)
The timer starts counting when 1 is written to T8ORUN. The clock input is disabled and the timer stops counting
when 0 is written to T8ORUN.
This control does not affect the counter data. Even when the timer has stopped counting, the counter retains its
count so that the timer can start counting again from that point.
When both T8ORUN and T8ORST are set to 1 at the same time, the timer starts counting after resetting the counter.
If the count of the counter matches the set value of the compare data register during count-up, the timer outputs the
compare match signal as a cause of interrupt. At the same time, the counter is reset to 0. If the interrupt has been
enabled, an interrupt request is sent to the interrupt controller (ITC).
If the timer is set in one-shot mode, the timer stops counting.
If the timer is set in repeat mode, the timer continues counting from the counter value 0.
One-shot mode
T8ORUN
T8ORST
T8OCMP
Input clock
T8OCNT
Reset
Repeat mode
T8ORUN
T8ORST
T8OCMP
Input clock
T8OCNT
Reset
14-6
0 1 2 3 4
0 1 2 3 4
Figure 14.6.1 Basic Operation Timing of Counter
EPSON
0x5
5
Reset and
compare match
interrupt
0x5
5 0 1 2
Reset and
compare match
interrupt
0
3 4 5 0 1
Reset and
compare match
interrupt
S1C17704 TECHNICAL MANUAL