Epson S1C17704 Technical Manual page 39

Peripheral Address
Clock timer 0x5000
(8-bit device)
0x5001
0x5002
0x5003
0x5004–0x501f –
Stopwatch 0x5020
timer
0x5021
(8-bit device)
0x5022
0x5023
0x5024–0x503f –
Watchdog timer 0x5040
(8-bit device)
0x5041
0x5042–0x505f –
Oscillator 0x5060
(8-bit device)
0x5061
0x5062
0x5063
0x5064
0x5065
0x5066–0x507f –
Clock generator 0x5080
(8-bit device)
0x5081
0x5082–0x509f –
LCD driver 0x50a0
(8-bit device)
0x50a1
0x50a2
0x50a3
0x50a4
0x50a5
0x50a6
0x50a7–0x50bf –
8-bit OSC1 0x50c0
timer
0x50c1
(8-bit device)
0x50c2
0x50c3
0x50c4
0x50c5–0x50df –
SVD circuit 0x5100
(8-bit device)
0x5101
0x5102
0x5103
0x5104
0x5105–0x511f –
Power supply 0x5120
circuit
(8-bit device)
0x5121–0x513f –
P port & 0x5200
port MUX
0x5201
(8-bit device)
0x5202
0x5203
0x5204
0x5205
0x5206
0x5207
0x5208
0x5209
0x520a–0x520f –
0x5210
0x5211
0x5212
0x5213
0x5214
0x5215
S1C17704 TECHNICAL MANUAL
Table 3.5.3.2 I/O Map (Internal Peripheral Area 2)
Register name
CT_CTL Clock Timer Control Register
CT_CNT Clock Timer Counter Register
CT_IMSK Clock Timer Interrupt Mask Register
CT_IFLG Clock Timer Interrupt Flag Register
–
SWT_CTL Stopwatch Timer Control Register
SWT_BCNT Stopwatch Timer BCD Counter Register
SWT_IMSK Stopwatch Timer Interrupt Mask Register
SWT_IFLG Stopwatch Timer Interrupt Flag Register
–
WDT_CTL Watchdog Timer Control Register
WDT_ST Watchdog Timer Status Register
–
OSC_SRC Clock Source Select Register
OSC_CTL Oscillation Control Register
OSC_NFEN Noise Filter Enable Register
OSC_LCLK LCD Clock Setup Register
OSC_FOUT FOUT Control Register
OSC_T8OSC1 T8OSC1 Clock Control Register
–
CLG_PCLK PCLK Control Register
CLG_CCLK CCLK Control Register
–
LCD_DCTL LCD Display Control Register
LCD_CADJ LCD Contrast Adjust Register
LCD_CCTL LCD Clock Control Register
LCD_VREG LCD Voltage Regulator Control Register
LCD_PWR LCD Power Voltage Booster Control Register
LCD_IMSK LCD Interrupt Mask Register
LCD_IFLG LCD Interrupt Flag Register
–
T8OSC1_CTL 8-bit OSC1 Timer Control Register
T8OSC1_CNT 8-bit OSC1 Timer Counter Data Register
T8OSC1_CMP 8-bit OSC1 Timer Compare Data Register
T8OSC1_IMSK 8-bit OSC1 Timer Interrupt Mask Register
T8OSC1_IFLG 8-bit OSC1 Timer Interrupt Flag Register
–
SVD_EN SVD Enable Register
SVD_CMP SVD Compare Voltage Register
SVD_RSLT SVD Detection Result Register
SVD_IMSK SVD Interrupt Mask Register
SVD_IFLG SVD Interrupt Flag Register
–
VD1_CTL V Control Register
D1
–
P0_IN P0 Port Input Data Register
P0_OUT P0 Port Output Data Register
P0_IO P0 Port I/O Direction Control Register
P0_PU P0 Port Pull-up Control Register
P0_SM P0 Port Schmitt Trigger Control Register
P0_IMSK P0 Port Interrupt Mask Register
P0_EDGE P0 Port Interrupt Edge Select Register
P0_IFLG P0 Port Interrupt Flag Register
P0_CHAT P0 Port Chattering Filter Control Register
P0_KRST P0 Port Key-Entry Reset Configuration Register Configures the P0 port key-entry reset function.
–
P1_IN P1 Port Input Data Register
P1_OUT P1 Port Output Data Register
P1_IO P1 Port I/O Direction Control Register
P1_PU P1 Port Pull-up Control Register
P1_SM P1 Port Schmitt Trigger Control Register
P1_IMSK P1 Port Interrupt Mask Register
Resets and starts/stops the timer.
Counter data
Enables/disables interrupt.
Indicates/resets interrupt occurrence status.
Reserved
Resets and starts/stops the timer.
BCD counter data
Enables/disables interrupt.
Indicates/resets interrupt occurrence status.
Reserved
Resets and starts/stops the timer.
Sets the timer mode and indicates NMI status.
Reserved
Selects a clock source.
Controls oscillation.
Enables/disables noise filters.
Sets up the LCD clock.
Controls clock output.
Sets up the 8-bit OSC1 timer clock.
Reserved
Controls the PCLK output.
Configures the CCLK division ratio.
Reserved
Controls the LCD display.
Controls the contrast.
Controls the LCD clock duty.
Controls the LCD drive voltage regulator.
Controls the LCD voltage booster.
Enables/disables interrupt.
Indicates/resets interrupt occurrence status.
Reserved
Sets the timer mode and starts/stops the timer.
Counter data
Sets compare data.
Enables/disables interrupt.
Indicates/resets interrupt occurrence status.
Reserved
Enables/disables the SVD operation.
Sets compare voltage.
Voltage detection results
Enables/disables interrupt.
Indicates/resets interrupt occurrence status.
Reserved
Controls the V
protection mode.
Reserved
P0 port input data
P0 port output data
Selects the P0 port I/O direction.
Controls the P0 port pull-up resistor.
Controls the P0 port Schmitt trigger input.
Enables/disables the P0 port interrupt.
Selects the signal edge for generating P0
port interrupts.
Indicates/resets the P0 port interrupt occur-
rence status.
Controls the P0 port chattering filter.
Reserved
P1 port input data
P1 port output data
Selects the P1 port I/O direction.
Controls the P1 port pull-up resistor.
Controls the P1 port Schmitt trigger input.
Enables/disables the P1 port interrupt.
EPSON
3 MEMORY MAP, BUS CONTROL
Function
voltage and heavy load
D1
3-9