APPENDIX A LIST OF I/O REGISTERS
0x50a0–0x50a6
Register name Address
Bit
LCD Display
0x50a0
D7
Control Register
(8 bits)
D6
(LCD_DCTL)
D5
D4
D3–2 –
D1–0 DSPC[1:0]
LCD Contrast
0x50a1
D7–4 –
Adjust Register
(8 bits)
D3–0 LC[3:0]
(LCD_CADJ)
LCD Clock
0x50a2
D7–2 –
Control Register
(8 bits)
D1–0 LDUTY[1:0] LCD duty select
(LCD_CCTL)
LCD Voltage
0x50a3
D7–5 –
Regulator
(8 bits)
D4
Control Register
D3–0 –
(LCD_VREG)
LCD Power
0x50a4
D7–2 –
Voltage Booster
(8 bits)
Control Register
D1
(LCD_PWR)
D0
LCD Interrupt
0x50a5
D7–1 –
Mask Register
(8 bits)
(LCD_IMSK)
D0
LCD Interrupt
0x50a6
D7–1 –
Flag Register
(8 bits)
(LCD_IFLG)
D0
AP-18
Name
Function
SEGREV
Segment output assignment control 1 Normal
COMREV
Common output assignment control 1 Normal
DSPAR
Display memory area control
DSPREV
Reverse display control
reserved
LCD display control
reserved
LCD contrast adjustment
reserved
reserved
LHVLD
LCD heavy load protection mode
reserved
reserved
VDSEL
Regulator power source select
PBON
Power voltage booster control
reserved
FRMIE
Frame signal interrupt enable
reserved
FRMIF
Frame signal interrupt flag
Setting
0 Reverse
0 Reverse
1 Area 1
0 Area 0
1 Normal
0 Reverse
–
DSPC[1:0]
0x3
0x2
0x1
Normal display
0x0
–
LC[3:0]
0xf
:
0x0
–
LDUTY[1:0]
0x3
0x2
0x1
0x0
–
1 On
0 Off
–
–
1 V
0 V
D2
1 On
0 Off
–
1 Enable
0 Disable
–
1 Cccurred
0 Not occurred
EPSON
LCD Driver
Init. R/W
Remarks
1
R/W
1
R/W
0
R/W
1
R/W
–
–
0 when being read.
Display
0x0 R/W
All off
All on
Display off
–
–
0 when being read.
Display
0x0 R/W
Dark
:
Light
–
–
0 when being read.
Duty
0x2 R/W
reserved
1/32
1/16
reserved
–
–
0 when being read.
0
R/W
–
–
0 when being read.
–
–
0 when being read.
0
R/W
DD
0
R/W
–
–
0 when being read.
0
R/W
–
–
0 when being read.
0
R/W Reset by writing 1.
S1C17704 TECHNICAL MANUAL