0X4102: Uart Receive Data Register (Uart_Rxd) - Epson S1C17704 Technical Manual

0x4102: UART Receive Data Register (UART_RXD)

Register name Address Bit
UART Receive 0x4102 D7–0 RXD[7:0]
Data Register (8 bits)
(UART_RXD)
D[7:0] RXD[7:0]: Receive Data
The data in the receive data buffer can be read from this register beginning with the older data first. The
received data enters the receive data buffer. The receive data buffer is a two-byte FIFO and can receive
data until it becomes full. When the buffer is full and also if the shift register contains received data,
an overrun error will occur if the received data is not read by the time the next data receiving begins.
The receive data buffer status flags RDRY (D1/UART_ST register) and RD2B (D3/UART_ST register)
are provided to indicate that the receive data buffer contains valid received data and the second data,
respectively.
When the receive data buffer has received the number of data specified with RBFI (D1/UART_CTL
register), a cause of receive buffer full interrupt occurs.
In 7-bit mode, 0 is stored in RXD7.
The serial data input from the SIN pin is converted into parallel data beginning with the LSB, with the
high-level signals changed to 1s and the low-level signals changed to 0s. The resulting data is stored in
the receive data buffer.
This register is a read-only register, so no data can be written to it. (Default: 0x0)
S1C17704 TECHNICAL MANUAL
Name Function
Receive data in the receive data
buffer
RXD7(6) = MSB
RXD0 = LSB
EPSON
Setting Init. R/W
0x0 to 0xff (0x7f) 0x0 R
18 UART
Remarks
Older data in the
buffer is read out
first.
18-17