Input Interface Level - Epson S1C17704 Technical Manual

10.5 Input Interface Level

The input interface level of the I/O port can be selected using PxSM[7:0] (Px_SM register) for each bit individually.
∗ P0SM[7:0]: P0[7:0] Port Schmitt Trigger Input Enable Bits in the P0 Port Schmitt Trigger Control (P0_SM)
Register (D[7:0]/0x5204)
∗ P1SM[7:0]: P1[7:0] Port Schmitt Trigger Input Enable Bits in the P1 Port Schmitt Trigger Control (P1_SM)
Register (D[7:0]/0x5214)
∗ P2SM[7:0]: P2[7:0] Port Schmitt Trigger Input Enable Bits in the P2 Port Schmitt Trigger Control (P2_SM)
Register (D[7:0]/0x5224)
∗ P3SM[3:0]: P3[3:0] Port Schmitt Trigger Input Enable Bits in the P3 Port Schmitt Trigger Control (P3_SM)
Register (D[3:0]/0x5234)
When PxSM[7:0] is set to 1 (default), the port is configured with a CMOS Schmitt level input interface. When the bit
is set to 0, the port is configured with a CMOS level input interface.
S1C17704 TECHNICAL MANUAL
EPSON
10 I/O PORTS (P)
10-5