0X4300: Interrupt Flag Register (Itc_Iflg) - Epson S1C17704 Technical Manual

0x4300: Interrupt Flag Register (ITC_IFLG)

Register name Address Bit
Interrupt Flag 0x4300 D15
Register (16 bits)
D14
(ITC_IFLG)
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D[15:8] IIFT[7:0]: Interrupt Flags (for Pulse Trigger)
These bits are interrupt flags to indicate the interrupt cause occurrence status.
1 (R): Cause of interrupt has occurred
0 (R): No cause of interrupt has occurred (default)
1 (W): Flag is reset
0 (W): Has no effect
The interrupt flag is set to 1 when a cause of interrupt occurs in each peripheral circuit.
If the following conditions are met at this time, an interrupt is generated to the S1C17 Core:
1. The corresponding bit of the Interrupt Enable Register is set to 1.
2. No other interrupt request of higher priority has occurred.
3. The IE bit of the PSR is set to 1 (interrupt enabled).
4. The corresponding interrupt level setup bits are set to a level higher than the S1C17 Core's interrupt
level (IL).
The interrupt flag is always set to 1 when a cause of interrupt occurs regardless of how the interrupt
enable and interrupt level setup bits are set.
In order for the next interrupt to be accepted after interrupt generation, the interrupt flag must be reset
and the PSR must be set up again (by setting the IE bit to 1 or executing the reti instruction).
The flag that has been set to 1 can be reset by writing 1.
Interrupt flag
IIFT0 (D8)
IIFT1 (D9)
IIFT2 (D10)
IIFT3 (D11)
IIFT4 (D12)
IIFT5 (D13)
IIFT6 (D14)
IIFT7 (D15)
S1C17704 TECHNICAL MANUAL
Name Function
2
IIFT7 I C interrupt flag
IIFT6 SPI interrupt flag
IIFT5 Remote controller interrupt flag
IIFT4 UART interrupt flag
IIFT3 16-bit timer Ch.2 interrupt flag
IIFT2 16-bit timer Ch.1 interrupt flag
IIFT1 16-bit timer Ch.0 interrupt flag
IIFT0 8-bit timer interrupt flag
EIFT7 PWM&capture timer interrupt flag 1 Cause of
EIFT6 LCD interrupt flag
EIFT5
SVD interrupt flag
EIFT4 8-bit OSC1 timer interrupt flag
EIFT3 Clock timer interrupt flag
EIFT2
Stopwatch timer interrupt flag
EIFT1 P1 port interrupt flag
EIFT0 P0 port interrupt flag
Table 6.7.2 Causes of Hardware Interrupt and Interrupt Flags
8-bit timer interrupt: timer underflow
16-bit timer Ch.0 interrupt: timer underflow
16-bit timer Ch.1 interrupt: timer underflow
16-bit timer Ch.2 interrupt: timer underflow
UART interrupt: transmit buffer empty/receive buffer full/receive error
Remote controller interrupt: data length counter underflow/input rising edge/
input falling edge
SPI interrupt: transmit buffer empty/receive buffer full
2
I C interrupt: transmit buffer empty/receive buffer full
6 INTERRUPT CONTROLLER (ITC)
Setting
1 Cause of 0 Cause of
interrupt
occurred
0 Cause of
interrupt
occurred
Cause of hardware interrupt
EPSON
Init. R/W Remarks
0 R/W Reset by writing 1.
interrupt not
0 R/W
occurred
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W Reset by writing 1 in
interrupt not pulse trigger mode.
0 R/W
occurred
0 R/W
Cannot be reset
0 R/W
by software in level
0 R/W
trigger mode.
0 R/W
0 R/W
0 R/W
6-13