0X430A: External Interrupt Level Setup Register 2 (Itc_Elv2) - Epson S1C17704 Technical Manual

0x430a: External Interrupt Level Setup Register 2 (ITC_ELV2)

Register name Address Bit
External 0x430a D15–13 –
Interrupt Level (16 bits)
D12
Setup Register 2
D11
(ITC_ELV2)
D10–8 EILV5[2:0]
D7–5 –
D4
D3
D2–0 EILV4[2:0]
D[15:13] Reserved
D12 EITG5: SVD Interrupt Trigger Mode Select Bit
Selects the trigger mode of the SVD interrupt. Set this bit 1 in the S1C17704.
1 (R/W): Level trigger mode
0 (R/W): Pulse trigger mode (default)
See the description of EITG1 (D12) in the ITC_ELV0 register (0x4306).
D11 Reserved
D[10:8] EILV5[2:0]: SVD Interrupt Level Bits
Sets the interrupt level (0 to 7) of the SVD interrupt. (Default: 0)
See the description of EILV1[2:0] (D[10:8]) in the ITC_ELV0 register (0x4306).
D[7:5] Reserved
D4 EITG4: 8-bit OSC1 Timer Interrupt Trigger Mode Select Bit
Selects the trigger mode of the 8-bit OSC1 timer interrupt. Set this bit 1 in the S1C17704.
1 (R/W): Level trigger mode
0 (R/W): Pulse trigger mode (default)
See the description of EITG1 (D12) in the ITC_ELV0 register (0x4306).
D3 Reserved
D[2:0] EILV4[2:0]: 8-bit OSC1 Timer Interrupt Level Bits
Sets the interrupt level (0 to 7) of the 8-bit OSC1 timer interrupt. (Default: 0)
See the description of EILV1[2:0] (D[10:8]) in the ITC_ELV0 register (0x4306).
S1C17704 TECHNICAL MANUAL
Name Function
reserved
EITG5 SVD interrupt trigger mode
– reserved
SVD interrupt level
reserved
EITG4 T8OSC1 interrupt trigger mode
– reserved
T8OSC1 interrupt level
EPSON
6 INTERRUPT CONTROLLER (ITC)
Setting Init. R/W
–
1 Level 0 Pulse
–
0 to 7 0x0 R/W
–
1 Level 0 Pulse
–
0 to 7 0x0 R/W
Remarks
– – 0 when being read.
0 R/W Be sure to set to 1.
– – 0 when being read.
– – 0 when being read.
0 R/W Be sure to set to 1.
– – 0 when being read.
6-19