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Epson S1C88650 Technical Manual

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CMOS 8 - BIT SINGLE CHIP MICROCOMPUTER
S1C88650
Technical Manual
S1C88650 Technical Hardware

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Summary of Contents for Epson S1C88650

  • Page 1 CMOS 8 - BIT SINGLE CHIP MICROCOMPUTER S1C88650 Technical Manual S1C88650 Technical Hardware...
  • Page 2 No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any...
  • Page 3 Configuration of product number Devices 88104 Development tools S5U1 88348 0A01 Packing specifications 00 : Besides tape & reel 0A : TCP BL 0B : Tape & reel BACK 0C : TCP BR 0D : TCP BT 0E : TCP BD 0F : Tape &...

  • Page 5: Table Of Contents

    5.2.3 WAIT state settings ... 35 5.2.4 Setting the bus authority release request signal ... 35 5.2.5 Stack page setting ... 35 5.2.6 Control of system controller ... 36 5.2.7 Programming notes ... 38 S1C88650 TECHNICAL MANUAL Contents EPSON CONTENTS...
  • Page 6 5.10.3 Setting of input clock ... 89 5.10.4 Operation and control of timer ... 89 5.10.5 Interrupt function ... 91 5.10.6 Setting of TOUT output ... 93 5.10.7 Transfer rate setting of serial interface ... 94 EPSON S1C88650 TECHNICAL MANUAL...
  • Page 7 AC Characteristics ...144 Oscillation Characteristics ...149 Characteristics Curves (reference value) ...150 PACKAGE ... 159 Plastic Package ...159 Ceramic Package for Test Samples ...160 PAD LAYOUT ... 161 10.1 Diagram of Pad Layout ...161 10.2 Pad Coordinates ...162 S1C88650 TECHNICAL MANUAL EPSON CONTENTS...
  • Page 8 CONTENTS APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) ... 163 Names and Functions of Each Part ...163 Precautions ...165 A.2.1 Precaution for operation ... 165 A.2.2 Differences from actual IC ... 165 Connecting to the Target System ...168 Product Specifications ...171...

  • Page 9: Introduction

    The LCD controller/driver contains an LCD drive power supply circuit and can drive an maximum of 126 32-dot LCD panel in low-power consumption. The S1C88650 has a built-in 11 12-dot kanji font ROM that contains JIS level-1 and level-2 kanji sets, 1.1 Features Table 1.1.1 lists the features of the S1C88650.

  • Page 10: Block Diagram

    Interrupt Controller Input Port I/O Port Serial Interface External Memory Interface Output Port LCD Driver Supply Voltage Detector 48K bytes+896K bytes Fig. 1.2.1 S1C88650 block diagram EPSON K00–K02 K03 (BREQ) K04–K07 P10 (SIN) P11 (SOUT) P12 (SCLK) P13 (SRDY) P14 (TOUT0/TOUT1)

  • Page 11: Pins

    P17/TOUT2/TOUT3 COM30 P16/FOUT COM29 P15/TOUT2/TOUT3 COM28 P14/TOUT0/TOUT1 COM27 P13/SRDY COM26 P12/SCLK COM25 P11/SOUT COM24 P10/SIN Fig. 1.3.1.1 S1C88650 pin layout EPSON 1 INTRODUCTION Pin No. Pin name Pin No. Pin name P07/D7 COM11 P06/D6 COM12 P05/D5 COM13 P04/D4 COM14 P03/D3...

  • Page 12: Pin Description

    P17/TOUT2/TOUT3 COM0–COM31 198–213, 112–97 SEG0–SEG125 214–252, 4–61, 68–96 RESET TEST TEST Table 1.3.2.1 S1C88650 pin description In/Out – Power supply (+) terminal – Power supply (GND) terminal – Internal logic system and oscillation system voltage regulator output terminals – LCD circuit power voltage booster output terminal –...

  • Page 13: Mask Option

    B OSC3 SYSTEM CLOCK 1. Internal Clock 2. User Clock S1C88650 mask option list The following shows the option list for generating the IC's mask pattern. Note that the Peripheral Circuit Board installed in the ICE does not support some options.
  • Page 14 This mask option can select the NMI generation cycle of the watchdog timer. Refer to Section 5.3.1, "Configuration = 32 kHz) OSC1 of watchdog timer", for details. = 32 kHz) OSC1 = 32 kHz) OSC1 = 32 kHz) OSC1 EPSON ______ S1C88650 TECHNICAL MANUAL...

  • Page 15: Power Supply

    <V > and <V Output voltage CHARACTERISTICS" for the voltage values. In the S1C88650, the LCD drive voltage is supplied to the built-in LCD driver which drives the LCD panel connected to the SEG and COM terminals. – Notes: • Under no circumstances should V output be used to drive external circuit.

  • Page 16: Cpu And Bus Configuration

    Like the I/O memory, display memory cannot be released to external memory. 3.2.5 Kanji font ROM The S1C88650 has a built-in kanji font ROM that can be used to store JIS level-1 and level-2 kanji sets, alphanumeric characters and music shift-JIS characters.

  • Page 17: Exception Processing Vectors

    CPU operations when an exception processing factor is generated. 3.4 CC (Customized Condition Flag) The S1C88650 does not use the customized condi- tion flag (CC) in the core CPU. Accordingly, it cannot be used as a branching condition for the conditional branching instruction (JRS, CARS).

  • Page 18: Bus Mode

    I/O ports. Expansion mode The expansion mode setting applies when the S1C88650 is used with less than 1M bytes 3 of external expanded memory. This mode is usable regardless of the MCU/MPU mode setting.

  • Page 19: Cpu Mode

    S1C88650 TECHNICAL MANUAL 3 CPU AND BUS CONFIGURATION 3.6 External Bus The S1C88650 has bus terminals that can address a 2FFFFFH maximum of 1M 3 bytes and memory (and other) devices can be externally expanded according to the range of each bus mode described in the previous section.

  • Page 20: Address Bus

    3 CPU AND BUS CONFIGURATION 3.6.2 Address bus The S1C88650 possesses a 20-bit external address bus A0–A19. The terminals and output circuits of address bus A0–A19 are shared with output ports R00–R07 (=A0–A7), R10–R17 (=A8–A15) and R20– R23 (=A16–A19), switching between these functions being determined by the bus mode setting.

  • Page 21: Wait Control

    3.6.5 WAIT control In order to insure accessing of external low speed devices during high speed operations, the S1C88650 is equipped with a WAIT function which prolongs access time. (See the "S1C88 Core CPU Manual" for details of the WAIT function.)

  • Page 22: Bus Authority Release State

    3 CPU AND BUS CONFIGURATION 3.6.6 Bus authority release state The S1C88650 is equipped with a bus authority release function on request from an external device so that DMA (Direct Memory Access) transfer can be conducted between external devices. The internal memory cannot be accessed by this function.

  • Page 23: Initial Reset

    4 INITIAL RESET Initial reset in the S1C88650 is required in order to initialize circuits. This section of the Manual contains a description of initial reset factors and the initial settings for internal registers, etc. 4.1 Initial Reset Factors There are two initial reset factors for the S1C88650 as shown below.

  • Page 24: Simultaneous Low Level Input At Input Port Terminals K00-K03

    65536/f LOW level simultaneous input. In this case, since a reset differential pulse (64/f seconds) is generated within the S1C88650, the CPU will start even if the LOW level simultaneous input status is not canceled. Note: The oscillation stabilization time described in this section does not include oscillation start time.

  • Page 25: Initial Settings After Initial Reset

    For initial value at initial reset, see the sections on the I/O memory map and peripheral circuit descriptions in the following chapter of this manual. S1C88650 TECHNICAL MANUAL Setting value Undefined Undefined Undefined Undefined...

  • Page 26: Peripheral Circuits And Their Operation

    5 PERIPHERAL CIRCUITS AND THEIR OPERATION The peripheral circuits of the S1C88650 is interfaced with the CPU by means of the memory mapped I/O method. For this reason, just as with other memory access operations, peripheral circuits can be controlled by manipulating I/O memory. Below is a description of the operation and control method for each individual peripheral circuit.
  • Page 27 PST11 PST10 Programmable timer 0 clock control PRPRT0 Programmable timer 0 division ratio PST02 PST02 PST01 PST01 PST00 S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function Reverse 12 12 LDUTY0 Duty Not allowed 1/16 1/32...
  • Page 28 / 64 / 16 OSC3 OSC1 / 32 OSC3 OSC1 OSC3 OSC1 OSC3 OSC1 OSC3 OSC1 EPSON SR R/W Comment – – Constantly "0" when – – being read – – Reserved register OSC3 OSC3 OSC3 OSC3 S1C88650 TECHNICAL MANUAL...
  • Page 29 ETM8 Clock timer 8 Hz interrupt enable register ETM2 Clock timer 2 Hz interrupt enable register ETM1 Clock timer 1 Hz interrupt enable register S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function PST70 (OSC3) (OSC1)
  • Page 30 – being read – – – – Not generated No operation – – Constantly "0" when – – being read – – – – – – Not generated No operation No interrupt factor is generated No operation S1C88650 TECHNICAL MANUAL...
  • Page 31 R/W register PTOUT1 PTM1 clock output control PTRUN1 PTM1 Run/Stop control PSET1 PTM1 preset CKSEL1 PTM1 input clock selection S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function Interrupt factor is generated Reset – – –...
  • Page 32 PTM1 data D6 PTM15 PTM1 data D5 PTM14 PTM1 data D4 PTM13 PTM1 data D3 PTM12 PTM1 data D2 PTM11 PTM1 data D1 PTM10 PTM1 data D0 (LSB) Function High High High High High High EPSON SR R/W Comment S1C88650 TECHNICAL MANUAL...
  • Page 33 PTM3 compare data D3 CDR32 PTM3 compare data D2 CDR31 PTM3 compare data D1 CDR30 PTM3 compare data D0 (LSB) S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function bit x 1 Enable – Preset External clock –...
  • Page 34 OSC1 Reset Reset 1 Hz 2 Hz 4 Hz 8 Hz High 16 Hz 32 Hz 64 Hz 128 Hz EPSON SR R/W Comment Disable – No operation Constantly "0" when – No operation being read Stop S1C88650 TECHNICAL MANUAL...
  • Page 35 – – – – – – STPB Serial I/F stop bit selection Serial I/F data input/output permutation selection S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function – With parity Clock source Programmable timer OSC3 OSC3...
  • Page 36 OSC3 4096/f OSC1 2048/f OSC1 512/f OSC1 128/f OSC1 None Output EPSON SR R/W Comment Interrupt generated at rising edge Low level – input – – "0" when being read – – "0" when being read Input S1C88650 TECHNICAL MANUAL...
  • Page 37 R/W register HZR1H R14–R17 high impedance control HZR1L R10–R13 high impedance control HZR0H R04–R07 high impedance control HZR0L R00–R03 high impedance control S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function Output High High High impedance EPSON...
  • Page 38 R32 output port data R31D R31 output port data R30D R30 output port data Function High impedance High impedance High High High High EPSON SR R/W Comment Reserved register Comple- mentary Reserved register Comple- mentary Reserved register Reserved register S1C88650 TECHNICAL MANUAL...
  • Page 39 PTM5 compare data D3 CDR52 PTM5 compare data D2 CDR51 PTM5 compare data D1 CDR50 PTM5 compare data D0 (LSB) S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function bit x 1 Enable – Preset External clock –...
  • Page 40 "0" when being read Reserved register Stop No operation "0" when being read Internal clock – – Constantly "0" when – – being read – – Reserved register Stop No operation "0" when being read Internal clock S1C88650 TECHNICAL MANUAL...
  • Page 41 PTM7 data D4 PTM73 PTM7 data D3 PTM72 PTM7 data D2 PTM71 PTM7 data D1 PTM70 PTM7 data D0 (LSB) S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map) Function High High High High EPSON SR R/W...

  • Page 42: System Controller And Bus Control

    Address bus A1 • In MCU mode: Address bus A2 At initial reset, the S1C88650 is set in single chip Address bus A3 mode (minimum). Address bus A4 Accordingly, in MCU mode, even if a memory Address bus A5...

  • Page 43: Wait State Settings

    5.2.3 WAIT state settings In order to insure accessing of external low speed devices during high speed operations, the S1C88650 is equipped with a WAIT function which prolongs access time. The number of wait states inserted can be selected from a choice of eight as shown in Table 5.2.3.1 by...

  • Page 44: Control Of System Controller

    CE2 disable In Single chip mode, CE1 disable these setting are fixed CE0 disable at DC output. – Expansion mode only Minimum Reserved register CE2 disable CE1 disable CE0 disable Input port Output port OSC1 Reserved register S1C88650 TECHNICAL MANUAL...
  • Page 45 In single chip mode, set page address to "00H". In expansion mode, it can be set to any value within the range "00H"–"27H". S1C88650 TECHNICAL MANUAL Since a carry and borrow from/to the stack pointer SP is not reflected in register SPP, the upper limit on continuous use of the stack area is 64K bytes.

  • Page 46: Programming Notes

    SPP ("00FF01H") and the stack pointer SP. Example: When setting the "178000H" address EP, #00H HL, #0FF01H During this period the [HL], #17H interrupts (including _______ SP, #8000H NMI) are masked. EPSON S1C88650 TECHNICAL MANUAL...

  • Page 47: Watchdog Timer

    5.3 Watchdog Timer 5.3.1 Configuration of watchdog timer The S1C88650 is equipped with a watchdog timer driven by OSC1 as source oscillation. The watchdog timer must be reset periodically by software, and if reset does not take place within the selected period, a non-maskable interrupt signal is generated and output to the CPU.

  • Page 48: Control Of Watchdog Timer

    NMI generation cycle is within the range of 98304/f seconds. EPSON SR R/W Comment Disable – No operation Constantly "0" when – No operation being read Stop ______ ______ is selected by OSC1 ______ to 131072/f OSC1 S1C88650 TECHNICAL MANUAL OSC1 OSC1...

  • Page 49: Oscillation Circuits

    5.4 Oscillation Circuits 5.4.1 Configuration of oscillation circuits The S1C88650 is twin clock system with two internal oscillation circuits (OSC1 and OSC3). The OSC3 oscillation circuit generates the main- clock (Max. 8.2 MHz) to run the CPU and some peripheral circuits in high speed, and the OSC1 oscillation circuit generates the sub-clock (Typ.

  • Page 50: Osc3 Oscillation Circuit

    (Input interrupt) HALT status ON or OFF STOP Standby Status EPSON ) between OSC3 and SOSC3=0 Low speed and low power operation OSC1 OSC3 SOSC3=1 CPU clock OSC1 SLP instruction SLEEP status OSC1 OSC3 CPU clock STOP S1C88650 TECHNICAL MANUAL...

  • Page 51: Control Of Oscillation Circuit

    OSC1, CLKCHG should be set to "0". At initial reset, CLKCHG is set to "1" (OSC3 clock). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Oscillation Circuits) Table 5.4.6.1 Oscillation circuit control bits Function...

  • Page 52: Input Ports (K Ports)

    5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Input Ports) 5.5 Input Ports (K ports) 5.5.1 Configuration of input ports The S1C88650 is equipped with 8 input port bits (K00–K07) all of which are usable as general purpose input port terminals with interrupt function.

  • Page 53: Pull-Up Control

    In this case, take care that a floating state does not occur in input. For unused ports, select "With resistor" and enable pull-up using the pull-up control registers. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Input Ports) 5.5.4 Interrupt function and input comparison register All the input ports (K00–K07) provide the interrupt...
  • Page 54 25 nsec or less. OSC1 Divider oscillation circuit OSC3 Divider oscillation circuit Interrupt priority level judgement circuit Interrupt priority register PK00, PK01 Address S1C88650 TECHNICAL MANUAL OSC1 OSC3 Interrupt request...

  • Page 55: Control Of Input Ports

    – CTK02L K00–K03 port chattering-eliminate setup (Input level check time) CTK02L CTK01L CTK00L CTK01L CTK00L S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Input Ports) Table 5.5.5.1(a) Input port control bits Function Interrupt generated at falling edge High level input –...
  • Page 56 Level 3 Level 2 Level 1 Level 0 – – Constantly "0" when – – being read Priority level Level 3 Level 2 Level 1 Level 0 Interrupt disable No interrupt factor is generated No operation Valid S1C88650 TECHNICAL MANUAL...
  • Page 57 EK0x. At initial reset, this register is set to "0" (None). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Input Ports) PK00, PK01: 00FF20H•D6, D7 Sets the input interrupt priority level. PK00 and PK01 are the interrupt priority registers corresponding to the input interrupts.

  • Page 58: Programming Notes

    (2) Be sure to disable interrupts before changing the contents of the CTK0x register. Unnecessary interrupts may occur if the register is changed when the corresponding input port interrupts have been enabled by the interrupt enable register EK0x. board) x 1.6 [sec] EPSON S1C88650 TECHNICAL MANUAL...

  • Page 59: Output Ports (R Ports)

    5.6 Output Ports (R ports) 5.6.1 Configuration of output ports The S1C88650 is equipped with 26 bits of output ports (R00–R07, R10–R17, R20–R25, R30–R33). Depending on the bus mode setting, the configura- tion of the output ports may vary as shown in the table below.

  • Page 60: Control Of Output Ports

    R20 output port data Table 5.6.4.1(a) Output port control bits Function High impedance High impedance High impedance High High High EPSON SR R/W Comment Reserved register Comple- mentary Reserved register Comple- mentary Reserved register Comple- mentary Reserved register S1C88650 TECHNICAL MANUAL...
  • Page 61 "0" is set, it becomes complementary output. At initial reset, this register is set to "0" (complementary). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Output Ports) Table 5.6.4.1(b) Output port control bits Function High R00D–R07D: 00FF73H...

  • Page 62: I/O Ports (P Ports)

    5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Ports) 5.7 I/O Ports (P ports) 5.7.1 Configuration of I/O ports The S1C88650 is equipped with 16 bits of I/O ports (P00–P07, P10–P17). The configuration of these I/O ports will vary according to the bus mode as shown below.

  • Page 63: Pull-Up Control

    (IOC14–IOC17) to set the port to the output mode. TOUT output (P14, P15) In order for the S1C88650 to provide clock signal to an external device, the terminals P14 and P15 can be used to output a TOUTx signal (clock output by the programmable timer).
  • Page 64 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Ports) FOUT output (P16) In order for the S1C88650 to provide clock signal to an external device, a FOUT signal (oscillation clock or f dividing clock) can be output from OSC1 OSC3 the P16 port terminal.

  • Page 65: Control Of I/O Ports

    P13 pull-up control register PULP12 P12 pull-up control register PULP11 P11 pull-up control register PULP10 P10 pull-up control register S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Ports) Table 5.7.6.1(a) I/O port control bits Function Output Output High...
  • Page 66 "0" when being read Internal clock – – Constantly "0" when – – being read – – Stop No operation "0" when being read Internal clock Disable – No operation Constantly "0" when – No operation being read Stop S1C88650 TECHNICAL MANUAL...
  • Page 67 S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Ports) PULP00–PULP07: 00FF64H PULP10–PULP17: 00FF65H The pull-up during the input mode are set with these registers.

  • Page 68: Programming Notes

    : Terminal capacitance Max. value OSC3 ________________ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ S1C88650 TECHNICAL MANUAL /n",...

  • Page 69: Serial Interface

    5.8 Serial Interface 5.8.1 Configuration of serial interface The S1C88650 incorporates a full duplex serial interface (when asynchronous system is selected) that allows the user to select either clock synchro- nous system or asynchronous system. The data transfer method can be selected in soft- ware.

  • Page 70: Transfer Modes

    Furthermore, since the SRDY terminal is Output not utilized either, both of these terminals can be used as I/O ports. Figure 5.8.3.1(c) shows the connection example of input/output terminals in the asynchronous mode. EPSON _________ _________ _________ _________ _________ _________ S1C88650 TECHNICAL MANUAL...

  • Page 71: Clock Source

    SCS1 SCS0 Programmable timer Fig. 5.8.4.1 Division of the synchronous clock S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) This register setting is invalid in clock synchronous External slave mode and the external clock input from the...

  • Page 72: Transmit-Receive Control

    "0", it indicates that receiving has stopped. For details on timing, see the timing chart which gives the timing for each mode. When you do not receive, set RXEN to "0" to disable receiving status. EPSON S1C88650 TECHNICAL MANUAL...

  • Page 73: Operation Of Clock Synchronous Transfer

    (See "5.4 Oscillation Circuits".) (6) Serial data input/output permutation The S1C88650 provides the data input/output permutation select register SDP to select whether the serial data bits are transfered from the LSB or MSB. The SDP register should be set before writing data to TRXD0–TRXD7.
  • Page 74 Data transmitting TXEN 0, RXEN TXEN Set transmitting data to TRXD0–TRXD7 Receiver ready ? TXTRG FSTRA = 1 ? Transmit complete ? TXEN Fig. 5.8.6.2 Transmit procedure in clock synchronous mode EPSON S1C88650 TECHNICAL MANUAL In case of master mode...
  • Page 75 "0" to the receive enable register RXEN, when the receiving is com- pleted. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) RXEN Received data reading from TRXD0–TRXD7 Fig.
  • Page 76 D0 D1 D2 D3 D4 D5 D6 D7 TRXD Interrupt (c) Receive timing for master mode RXEN RXTRG (RD) RXTRG (WR) SCLK D0 D1 D2 D3 D4 D5 D6 D7 TRXD SRDY Interrupt (d) Receive timing for slave mode EPSON S1C88650 TECHNICAL MANUAL 1st data 1st data...

  • Page 77: Operation Of Asynchronous Transfer

    /receiving in case of asynchronous data transfer. See "5.8.8 Interrupt function" for the serial interface interrupts. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) Initialization of serial interface The below initialization must be done in cases of asynchronous system transfer.
  • Page 78 1 bit – 1 bit (8) Serial data input/output permutation The S1C88650 provides the data input/output permutation select register SDP to select whether the serial data bits are transfered from the LSB or MSB. The SDP register should be set before writing data to TRXD0–TRXD7.
  • Page 79 (4) Read the received data from TRXD0–TRXD7 using receiving complete interrupt. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) (5) Write "1" to the receive control bit RXTRG to inform that the receive data has been read out.
  • Page 80 Furthermore, when the timing for writing "1" to RXTRG and the timing for the received data transfer to the received data buffer overlap, it will be recognized as an overrun error. Timing chart Figure 5.8.7.4 show the asynchronous transfer timing chart. EPSON S1C88650 TECHNICAL MANUAL...

  • Page 81: Interrupt Function

    "5.14 Interrupt and Standby Status". Figure 5.8.8.1 shows the configuration of the serial interface interrupt circuit. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) D0 D1 D2 D3 D4 D5 D6 D7 (a) Transmit timing...
  • Page 82 PER (parity error), OER (overrun error) and FER (framing error). The exception processing vector address is set as follows: Receive error interrupt: 000028H. EPSON Interrupt priority Interrupt level judgement request circuit S1C88650 TECHNICAL MANUAL...

  • Page 83: Control Of Serial Interface

    – – – – STPB Serial I/F stop bit selection Serial I/F data input/output permutation selection S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) Table 5.8.9.1(a) Serial interface control bits Function – With parity Clock source Programmable timer...
  • Page 84 – – – – Interrupt disable – – Constantly "0" when – being read – – – – – – – No generated No operation SMD0 Mode Asynchronous 8-bit Asynchronous 7-bit Clock synchronous slave Clock synchronous master S1C88650 TECHNICAL MANUAL...
  • Page 85 Parity is valid only in asynchronous mode and the EPR setting becomes invalid in the clock synchro- nous mode. At initial reset, EPR is set to "0" (non parity). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) PMD: 00FF48H•D5 Selects odd parity/even parity.
  • Page 86 PER is reset to "0" by writing "1". At initial reset and when RXEN is "0", PER is set to "0" (no error). EPSON S1C88650 TECHNICAL MANUAL ) level bit "1" and...
  • Page 87 "0" are disabled. At initial reset, this register is set to "0" (interrupt disabled). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface) FSTRA, FSREC, FSERR: 00FF27H•D0, D1, D2 Indicates the serial interface interrupt generation status.

  • Page 88: Programming Notes

    Refer to the oscillation start time example indicated in Chapter 8, "ELECTRICAL CHARACTERISTICS".) At initial reset, the OSC3 oscillation circuit is set to ON status. OSC3 EPSON S1C88650 TECHNICAL MANUAL...

  • Page 89: Clock Timer

    5.9 Clock Timer 5.9.1 Configuration of clock timer The S1C88650 has built in a clock timer that uses the OSC1 oscillation circuit as clock source. The clock timer is composed of an 8-bit binary counter that uses the 256 Hz signal dividing f input clock and can read the data of each bit (128–1...
  • Page 90 FTM8 Interrupt enable register ETM8 Interrupt factor flag FTM2 Interrupt enable register ETM2 Interrupt factor flag FTM1 Interrupt enable register ETM1 Fig. 5.9.2.2 Timing chart of clock timer EPSON Interrupt priority Interrupt level judgement request circuit S1C88650 TECHNICAL MANUAL...

  • Page 91: Control Of Clock Timer

    Clock timer 8 Hz interrupt factor flag FTM2 Clock timer 2 Hz interrupt factor flag FTM1 Clock timer 1 Hz interrupt factor flag S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Clock Timer) Table 5.9.3.1 Clock timer control bits Function Enable...
  • Page 92 The interrupt factor flag is reset to "0" by writing "1". At initial reset, this flag is reset to "0". Level 3 (IRQ3) Level 2 (IRQ2) Level 1 (IRQ1) Level 0 (None) EPSON Valid Interrupt factor present Interrupt factor not present S1C88650 TECHNICAL MANUAL...

  • Page 93: Programming Notes

    SLEEP status. Therefore, when shifting to SLEEP status, set the clock timer to STOP status (TMRUN = "0") prior to executing the SLP instruction. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Clock Timer) EPSON...

  • Page 94: Programmable Timer

    5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) 5.10 Programmable Timer 5.10.1 Configuration of programmable timer The S1C88650 has four built-in 16-bit program- mable timer systems. Each system timer consists of a 16-bit presettable down counter, and can be used as 16-bit...

  • Page 95: Operation Mode

    When "0" is set to the MODE16_A register, Timers 0 and 1 enter the 8-bit mode (8-bit 2 channels) and when "1" is set, they enter the 16-bit mode (16-bit 1 channel). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) Timer 4 Clock selection...
  • Page 96 Fixed at "0" Stop No operation "0" when being read Internal clock – – Constantly "0" when – – being read – – Reserved register Fixed at "0" Fixed at "0" "0" when being read Fixed at "0" S1C88650 TECHNICAL MANUAL...

  • Page 97: Setting Of Input Clock

    The prescaler provides the division ratio selection register PSTx0–PSTx2 for each timer. Note that the division ratio varies depending on the selected source clock. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) Table 5.10.3.2 Division ratio and control registers PSTx2 The set clock is output to Timer x by writing "1"...
  • Page 98 The interrupt generated does not stop the down counting. After an underflow interrupt is generated, the counter continues counting from the initial value reloaded. Compare match Underflow interrupt interrupt generation generation EPSON S1C88650 TECHNICAL MANUAL Reload...

  • Page 99: Interrupt Function

    Compare match Timer 7 Counter underflow Compare match S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) In the 16-bit mode, the interrupt factor flags of Timer(H) are set to "1" by the compare match and underflow in 16 bits.
  • Page 100 Timer 4 Timer 5 Interrupt priority level judgment circuit Timer 6 Timer 7 EPSON S1C88650 TECHNICAL MANUAL Timer 0 interrupt request Timer 1 interrupt request Timer 2 interrupt request Timer 3 interrupt request Timer 4 interrupt request...

  • Page 101: Setting Of Tout Output

    Output from TOUTx (P14/P15) terminal Output from TOUTx (P17) terminal Fig. 5.10.6.1 Output waveform of TOUT signal S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) However, it needs a condition setting: RDR > CDR, 0. In the case of RDR is fixed at "1".

  • Page 102: Transfer Rate Setting Of Serial Interface

    (for 1/16 or 1/32 duty) RDR5X = ————— - 1 (for 1/8 duty) RDR5X = ————— - 1 fdiv: Input clock frequency (setteing of PST5X) : Frame frequency (Hz) EPSON fdiv = 3.6864 MHz OSC3 PST1X RDR1X fdiv fdiv S1C88650 TECHNICAL MANUAL...

  • Page 103: Control Of Programmable Timer

    PST51 PST50 PRPRT4 Programmable timer 4 clock control PST42 Programmable timer 4 division ratio PST42 PST41 PST41 PST40 S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) Function PST10 (OSC3) (OSC1) / 4096 / 128 OSC3 OSC1 / 1024...
  • Page 104 – Level 0 – – Constantly "0" when – – being read – – Constantly "0" when – – being read – – – – PPT6 Priority PPT4 level Level 3 Level 2 Level 1 Level 0 S1C88650 TECHNICAL MANUAL...
  • Page 105 – R/W register PTOUT1 PTM1 clock output control PTRUN1 PTM1 Run/Stop control PSET1 PTM1 preset CKSEL1 PTM1 input clock selection S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) Function Interrupt enable Interrupt factor is generated Reset Interrupt...
  • Page 106 PTM1 data D6 PTM15 PTM1 data D5 PTM14 PTM1 data D4 PTM13 PTM1 data D3 PTM12 PTM1 data D2 PTM11 PTM1 data D1 PTM10 PTM1 data D0 (LSB) Function High High High High High High EPSON SR R/W Comment S1C88650 TECHNICAL MANUAL...
  • Page 107 PTM3 compare data D3 CDR32 PTM3 compare data D2 CDR31 PTM3 compare data D1 CDR30 PTM3 compare data D0 (LSB) S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) Function bit x 1 Enable – Preset External clock –...
  • Page 108 "0" when being read Reserved register Stop No operation "0" when being read Internal clock – – Constantly "0" when – – being read – – Reserved register Stop No operation "0" when being read Internal clock S1C88650 TECHNICAL MANUAL...
  • Page 109 – R/W register – R/W register PTRUN7 PTM7 Run/Stop control PSET7 PTM7 preset CKSEL7 PTM7 input clock selection S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) Function High High High High bit x 1 Enable – Preset External clock –...
  • Page 110 PTM7 data D6 PTM75 PTM7 data D5 PTM74 PTM7 data D4 PTM73 PTM7 data D3 PTM72 PTM7 data D2 PTM71 PTM7 data D1 PTM70 PTM7 data D0 (LSB) Function High High High High High High EPSON SR R/W Comment S1C88650 TECHNICAL MANUAL...
  • Page 111 The clock to be input to each timer is selected from either the external clock (input signal of input port) or the internal clock (prescaler output clock). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) When "0" is written to the CKSELx register, the internal clock (prescaler output INCLx) is selected as the input clock for Timer x.
  • Page 112 No operation results when "0" is written. In the 16-bit mode, writing "1" to PSET(H) is invalid because 16-bit data is preset by PSET(L) only. PSETx is only for writing, and it is always "0" during reading. EPSON S1C88650 TECHNICAL MANUAL...
  • Page 113 PTOUT3 is effective. Furthermore, if the programmable timer is set in 16-bit mode, the TOUT0 and TOUT2 signals cannot be output. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) RPTOUT2: 00FF38H•D4 RPTOUT3: 00FF39H•D4 Controls the output of the TOUT signal.
  • Page 114 Indicates the generation of compare match inter- rupt factor. When "1" is read: Int. factor has generated When "0" is read: Int. factor has not generated When "1" is written: Factor flag is reset When "0" is written: Invalid EPSON S1C88650 TECHNICAL MANUAL...

  • Page 115: Programming Notes

    (PTOUTx = "0") so that an unstable clock is not output to the clock output port terminal. S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer) (3) In the 16-bit mode, reading PTM(L) does not latch the Timer(H) counter data in PTM(H). To...

  • Page 116: Lcd Driver

    5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) 5.11 LCD Driver 5.11.1 Configuration of LCD driver The S1C88650 has a built-in dot matrix LCD driver that can drive an LCD panel with a maximum of 4,032 dots (126 segments 32 commons).

  • Page 117: Frame Frequency

    S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) 5.11.4 Switching drive duty The S1C88650 supports three types of LCD drive duty settings, 1/8, 1/16 and 1/32, and it can be switched using the LDUTY0 and LDUTY1 registers.
  • Page 118 COM0 COM1 COM2 SEG0 SEG1 COM0–SEG0 COM0–SEG1 when f (32.768 kHz) is selected as the source clock (FRMCS = "0") OSC1 Fig. 5.11.4.1 Drive waveform for 1/32 duty EPSON 32 Hz* – – – – S1C88650 TECHNICAL MANUAL (GND) (GND)
  • Page 119 COM0 S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) COM0 COM1 COM2 SEG0 SEG1 COM0–SEG0 COM0–SEG1 when f (32.768 kHz) is selected as the source clock (FRMCS = "0") OSC1 Fig. 5.11.4.2 Drive waveform for 1/16 duty...
  • Page 120 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) COM0 COM0 COM1 COM2 SEG0 SEG1 COM0–SEG0 COM0–SEG1 when f (32.768 kHz) is selected as the source clock (FRMCS = "0") OSC1 Fig. 5.11.4.3 Drive waveform for 1/8 duty EPSON 64 Hz* S1C88650 TECHNICAL MANUAL (GND) (GND)

  • Page 121: Display Memory

    5.11.5 Display memory The S1C88650 has a built-in 768-byte display memory. The display memory is allocated to address Fx00H–Fx7FH (x = 8–DH) and the corre- spondence between the memory bits and com- mon/segment terminal is changed according to the selection status of the following items.
  • Page 122 Fig. 5.11.5.1 Display memory map for 1/32 duty and 16 16/5 8-dot font 0–F 0–F 0–F 0–F Display area Display area Display area Display area 32–47 48–63 64–79 95–80 79–64 63–48 EPSON 0–F 0–F 0–D 80–95 96–111 112–125 47–32 31–16 15–0 S1C88650 TECHNICAL MANUAL...
  • Page 123 SEG (reverse) 125–112 111–96 1: SEGREV = "0" 2: SEGREV = "1" Fig. 5.11.5.2 Display memory map for 1/32 duty and 12 12-dot font S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) 0–F 0–F 0–F 0–F Display area...
  • Page 124 Display area 0 (when DSPAR is set to "0") Display area 1 (when DSPAR is set to "1") Display area 1 (when DSPAR is set to "1") 32–47 48–63 64–79 95–80 79–64 63–48 EPSON 0–F 0–F 0–D 80–95 96–111 112–125 47–32 31–16 15–0 S1C88650 TECHNICAL MANUAL...
  • Page 125 SEG (reverse) 125–112 111–96 1: SEGREV = "0" 2: SEGREV = "1" Fig. 5.11.5.4 Display memory map for 1/16 duty and 12 12-dot font S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) 0–F 0–F 0–F 0–F Display area 0 (when DSPAR is set to "0") Display area 0 (when DSPAR is set to "0")
  • Page 126 0–F 0–F 0–F Display area 0 (when DSPAR is set to "0") Display area 1 (when DSPAR is set to "1") 32–47 48–63 64–79 95–80 79–64 63–48 EPSON 0–F 0–F 0–D 80–95 96–111 112–125 47–32 31–16 15–0 S1C88650 TECHNICAL MANUAL...
  • Page 127 SEG (reverse) 125–112 111–96 1: SEGREV = "0" 2: SEGREV = "1" Fig. 5.11.5.6 Display memory map for 1/8 duty and 12 12-dot font S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) 0–F 0–F 0–F 0–F Display area 0 (when DSPAR is set to "0") Display area 1 (when DSPAR is set to "1")

  • Page 128: Display Control

    LC0–LC3, and the setting values corre- spond to the contrast as shown in Table 5.11.6.2. Table 5.11.6.2 LCD contrast adjustment and V EPSON to V terminals Contrast Dark Light S1C88650 TECHNICAL MANUAL...

  • Page 129: Control Of Lcd Driver

    LDUTY0, LDUTY1: 00FF10H•D0, D1 Selects the drive duty. LDUTY1 LDUTY0 At initial reset, LDUTY is set to "10" (1/16 duty). S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) Table 5.11.7.1 LCD driver control bits Function – –...
  • Page 130 "1" is written, programmable timer 5 is selected. At initial reset, FRMCS is set to "0" (f EPSON LCD display All LCDs lit (Static) All LCDs out (Dynamic) Normal display Drive OFF Contrast Dark Light to V OSC1 Valid is selected, OSC1 OSC1 S1C88650 TECHNICAL MANUAL...

  • Page 131: Programming Notes

    When "0" is written to VDSEL, the LCD system voltage regulator is driven with V At initial reset, VDSEL is set to "0" (V S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (LCD Driver) 5.11.8 Programming notes (1) When the SLP instruction is executed, display control registers LCDC0 and LCDC1 are automatically reset to "0"...

  • Page 132: Supply Voltage Detection (Svd) Circuit

    5.12 Supply Voltage Detection (SVD) Circuit 5.12.1 Configuration of SVD circuit The S1C88650 has a built-in SVD (supply voltage detection) circuit, so that the software can find when the source voltage lowers. Turning the SVD circuit ON/OFF and the SVD criteria voltage setting can be done with software.

  • Page 133: Control Of Svd Circuit

    The result of supply voltage detection at time of SVDON is set to "0" can be read from this latch. At initial reset, SVDDT is set to "0". S1C88650 TECHNICAL MANUAL 5 PERIPHERAL CIRCUITS AND THEIR OPERATION (SVD Circuit) Table 5.12.3.1 SVD circuit control bits...

  • Page 134: Heavy Load Protection Function

    5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Heavy Load Protection Function) 5.13 Heavy Load Protection Function 5.13.1 Outline of heavy load protection function The S1C88650 has a heavy load protection function to prevent malfunction due to a power voltage fluctuation caused by a heavy battery load such as when an external lamp is driven and while the IC is running in high-speed with the OSC3 clock.

  • Page 135: Interrupt And Standby Status

    Refer to the explanations of the respective periph- eral circuits for details on each interrupt. HALT status By executing the program's HALT instruction, the S1C88650 enters the HALT status. Since CPU operation stops in the HALT status, power consumption can be reduced with only peripheral circuit operation.
  • Page 136 ETM1 Fig. 5.14.1 Configuration of interrupt circuit EPSON Vector Interrupt vector address address generation circuit PK00 PK01 PPT0 PPT1 PPT2 PPT3 Interrupt priority IRQ3 level judgement IRQ2 circuit IRQ1 PPT4 PPT5 PPT6 PPT7 PSIF0 PSIF1 PTM0 PTM1 S1C88650 TECHNICAL MANUAL...

  • Page 137: Interrupt Factor Flag

    Falling edge of the clock timer 8 Hz signal Falling edge of the clock timer 2 Hz signal Falling edge of the clock timer 1 Hz signal S1C88650 TECHNICAL MANUAL Note: When executing the RETE instruction without resetting the interrupt factor flag after an interrupt has been generated, the same interrupt will be generated.

  • Page 138: Interrupt Enable Register

    00FF26H·D1 ETM2 FTM1 00FF26H·D0 ETM1 EPSON 00FF24H·D7 00FF24H·D6 00FF24H·D5 00FF24H·D4 00FF24H·D3 00FF24H·D2 00FF24H·D1 00FF24H·D0 00FF25H·D0 00FF25H·D1 00FF25H·D2 00FF25H·D3 00FF25H·D4 00FF25H·D5 00FF25H·D6 00FF25H·D7 00FF2CH·D0 00FF2CH·D1 00FF2CH·D2 00FF2CH·D3 00FF2CH·D4 00FF2CH·D5 00FF2CH·D6 00FF2CH·D7 00FF23H·D2 00FF23H·D1 00FF23H·D0 00FF22H·D3 00FF22H·D2 00FF22H·D1 00FF22H·D0 S1C88650 TECHNICAL MANUAL...

  • Page 139: Interrupt Priority Register And Interrupt Priority Level

    Acceptable interrupt Level 4 (NMI) Level 4, Level 3 (IRQ3) Level 4, Level 3, Level 2 (IRQ2) Level 4, Level 3, Level 2, Level 1 (IRQ1) S1C88650 TECHNICAL MANUAL Table 5.14.4.1 Interrupt priority register Interrupt priority register PK00, PK01 PPT0, PPT1...

  • Page 140: Exception Processing Vectors

    000044H PTM 6 underflow interrupt 000046H PTM 6 compare match interrupt 000048H PTM 7 underflow interrupt 00004AH PTM 7 compare match interrupt 00004CH System reserved (cannot be used) 00004EH Software interrupt 0000FEH EPSON S1C88650 TECHNICAL MANUAL Priority High priority rating...

  • Page 141: Control Of Interrupt

    – – – ESERR Serial I/F (error) interrupt enable register ESREC Serial I/F (receiving) interrupt enable register ESTRA Serial I/F (transmitting) interrupt enable register S1C88650 TECHNICAL MANUAL Table 5.14.6.1(a) Interrupt control bits Function PK01 PK00 PSIF1 PSIF0 – – PTM1 PTM0 –...
  • Page 142 – being read – – – – Not generated No operation – – Constantly "0" when – – being read – – – – – – Not generated No operation No interrupt factor is generated No operation S1C88650 TECHNICAL MANUAL...

  • Page 143: Programming Notes

    (2) Beware. If the interrupt flags (I0 and I1) have been rewritten (set to lower priority) prior to resetting an interrupt factor flag after an interrupt has been generated, the same interrupt will be generated again. S1C88650 TECHNICAL MANUAL Table 5.14.6.1(c) Interrupt control bits Function Interrupt factor is...

  • Page 144: Summary Of Notes

    6 SUMMARY OF NOTES 6 SUMMARY OF NOTES 6.1 Notes for Low Current Consumption The S1C88650 can turn circuits, which consume a large amount of power, ON or OFF by control registers. You can reduce power consumption by creating a program that operates the minimum necessary circuits using these control registers.

  • Page 145: Precautions On Mounting

    RESET terminal in the shortest line. S1C88650 TECHNICAL MANUAL <Power Supply Circuit> Sudden power supply variation due to noise may cause malfunction. Consider the following...
  • Page 146 (2) The inspection process of the product needs an environment that shields the IC from visible radiation. (3) As well as the face of the IC, shield the back and side too. EPSON S1C88650 TECHNICAL MANUAL...

  • Page 147: Basic External Wiring Diagram

    30 pF (Ceramic oscillation) Resistor for CR oscillation 40 k Note: The above table is simply an example, and is not guaranteed to work. S1C88650 TECHNICAL MANUAL panel S1C88650 [The potential of the substrate (back of the chip) is V...

  • Page 148: Electrical Characteristics

    -0.3 to V + 0.3 -0.3 to V + 0.3 -20 to +70 -65 to +150 260 C, 10 sec ( lead section ) Min. Typ. Max. Unit 32.768 0.03 0.03 S1C88650 TECHNICAL MANUAL = 0 V) Note – Note...

  • Page 149: Dc Characteristics

    Segment/Common output current Note) 1 When CMOS Schmitt level is selected by mask option. When addition of pull-up resistor is selected by mask option. S1C88650 TECHNICAL MANUAL = 0 V, Ta = -20 to 70 C Condition Kxx, Pxx Kxx, Pxx...

  • Page 150: Analog Circuit Characteristics

    0.79•V 0.83•V 4.20 4.30 4.40 4.50 4.60 4.70 4.80 Typ 0.94 4.90 Typ 1.06 5.00 5.10 5.20 5.30 5.40 5.50 5.60 5.70 Min. Typ. Max. Unit Note – – – 1.85 1.95 2.05 Typ 0.91 Typ 1.09 S1C88650 TECHNICAL MANUAL...

  • Page 151: Power Current Consumption

    LCD circuit are active. Current consumption increases according to the display contents and panel load. This value is added to the current consumption during execution or current consumption during execution in heavy load protection mode when the SVD circuit is active. S1C88650 TECHNICAL MANUAL = 0 V, Ta = 25 C, C –C = 0.1 F, No panel load...

  • Page 152: Ac Characteristics

    4-cycle instruction 5-cycle instruction 6-cycle instruction 1-cycle instruction 2-cycle instruction 3-cycle instruction 4-cycle instruction 5-cycle instruction 6-cycle instruction EPSON Min. Typ. Max. Unit Note 32.768 0.03 0.24 66.7 0.49 133.3 0.73 200.0 0.98 266.7 1.22 333.3 1.46 400.0 S1C88650 TECHNICAL MANUAL...
  • Page 153 Substitute the number of states for wait insertion in n. ICLK A00–A19 A00–A19 DOUT * In the case of crystal oscillation and ceramic oscillation: * In the case of CR oscillation: S1C88650 TECHNICAL MANUAL = 0.8V = 0.2V Symbol Min. l-50+n• h-40 c-10+n•...
  • Page 154 = 0.2V Symbol Min. = 0.8V = 0.2V Symbol Min. Symbol Min. Start bit EPSON = 0.8V = 0.2V Typ. Max. Unit = 0.8V = 0.2V Typ. Max. Unit Typ. Max. Unit Stop bit S1C88650 TECHNICAL MANUAL Note Note Note...

  • Page 155: Input Clock

    ___________ • RESET input clock Condition: V = 1.8 to 3.6 V, V = 0 V, Ta = 25 C, V Item RESET input time RESET S1C88650 TECHNICAL MANUAL = 0.8V = 0.2V Symbol Min. Typ. sccy evcy 64/f OSC1...
  • Page 156 = 0 V, Ta = 25 C Item Operating power voltage RESET input time *1 Because the potential of the RESET terminal not reached V Symbol Min. 0.5V RESET 0.1V Power ON RESET EPSON Typ. Max. Unit level or higher. S1C88650 TECHNICAL MANUAL Note...

  • Page 157: Oscillation Characteristics

    Oscillation start time External gate capacitance Built-in drain capacitance Frequency/IC deviation Frequency/power voltage deviation Frequency adjustment range Q12C2000 Made by Seiko Epson corporation OSC1 (CR) Unless otherwise specified: V = 1.8 to 3.6 V, V Item Symbol Oscillation start time...

  • Page 158: Characteristics Curves (Reference Value)

    High level output current-voltage characteristic Low level output current-voltage characteristic –V = 3.6 V = 3.6 V = 2.4 V EPSON Ta = 70°C, Max. value = 1.8 V = 2.4 V Ta = 70°C, Min. value = 1.8 V S1C88650 TECHNICAL MANUAL...
  • Page 159 Connects 1 M load resistor between V LCD drive voltage-supply voltage characteristic (when the power voltage booster is used) Connects 1 M load resistor between V S1C88650 TECHNICAL MANUAL and V . (no panel load) and V . (no panel load)
  • Page 160 1.02V 1.01V 1.00V 0.99V 0.98V 0.97V 0.96V 0.95V LCD drive voltage-load characteristic 5.30 5.25 5.20 5.15 5.10 5.05 5.00 4.95 4.90 Ta [ C] Ta = 25°C, Typ. value, LCx = 8H [ A] EPSON Typ. value S1C88650 TECHNICAL MANUAL...
  • Page 161 SVD voltage-ambient temperature characteristic 1.05V 1.04V 1.03V 1.02V 1.01V 1.00V 0.99V 0.98V 0.97V 0.96V 0.95V S1C88650 TECHNICAL MANUAL Ta [ C] EPSON 8 ELECTRICAL CHARACTERISTICS Typ. value, SVDSx = FH...
  • Page 162 (During operation with OSC1) <Crystal oscillation, f In HALT status current consumption resistor characteristic (During operation with OSC1) <CR oscillation> = 32.768 kHz> OSC1 Ta [ C] Max. Typ. 1000 [k ] EPSON Typ. value Ta = 25°C 10000 S1C88650 TECHNICAL MANUAL...
  • Page 163 In executed status current consumption temperature characteristic (During operation with OSC1) <Crystal oscillation, f In executed status current consumption resistor characteristic (During operation with OSC1) <CR oscillation> S1C88650 TECHNICAL MANUAL 8 ELECTRICAL CHARACTERISTICS = 32.768 kHz> OSC1 Ta [ C] Max.
  • Page 164 1500 1000 In executed status current consumption resistor characteristic (During operation with OSC3) <CR oscillation> 1800 1600 1400 1200 1000 [MHz] OSC3 [k ] EPSON Ta = 25°C Max. Typ. 10.0 Ta = 25°C Max. Typ. 1000 S1C88650 TECHNICAL MANUAL...
  • Page 165 Oscillation frequency resistor characteristic (OSC1) <CR oscillation> 1000 Oscillation frequency temperature characteristic (OSC1) <CR oscillation> 1000 S1C88650 TECHNICAL MANUAL 8 ELECTRICAL CHARACTERISTICS Ta = 25°C, Typ. value 1000 [k ] Typ. value, R Ta [ C] EPSON 10000 = 1500 k...
  • Page 166 8 ELECTRICAL CHARACTERISTICS Oscillation frequency resistor characteristic (OSC3) <CR oscillation> 10000 1000 Oscillation frequency temperature characteristic (OSC3) <CR oscillation> 10000 1000 Ta = 25°C, Typ. value [k ] Typ. value, R Ta [ C] EPSON 1000 = 40 k S1C88650 TECHNICAL MANUAL...

  • Page 167: Package

    9 PACKAGE 9.1 Plastic Package QFP22-256pin S1C88650 TECHNICAL MANUAL INDEX +0.05 0.16 –0.03 EPSON 9 PACKAGE (Unit: mm) +0.05 0.125 –0.025...

  • Page 168: Ceramic Package For Test Samples

    SEG100 SEG101 SEG102 SEG103 SEG104 SEG105 SEG106 – – SEG107 – – SEG108 – – SEG109 – – S1C88650 TECHNICAL MANUAL Pin name SEG110 SEG111 SEG112 SEG113 SEG114 SEG115 SEG116 SEG117 SEG118 SEG119 SEG120 SEG121 SEG122 SEG123 SEG124 SEG125 COM31...

  • Page 169: Pad Layout

    10 PAD LAYOUT 10.1 Diagram of Pad Layout Pad 119 is used for the IC shipment test, so you should not bond it. S1C88650 TECHNICAL MANUAL (0, 0) 6.7 mm EPSON 10 PAD LAYOUT Die. No. Chip thickness: 400 µm Pad opening: 90 µm...

  • Page 170: Pad Coordinates

    2.007 2.100 -3.232 3.232 2.107 2.200 -3.232 3.232 2.207 2.300 -3.232 3.232 2.307 2.400 -3.232 3.232 2.407 2.500 -3.232 3.232 2.507 2.600 -3.232 3.232 2.607 2.700 -3.232 3.232 2.707 2.800 -3.232 3.232 2.807 2.900 -3.232 3.232 2.907 S1C88650 TECHNICAL MANUAL...

  • Page 171: Appendix A S5U1C88000P1&S5U1C88649P2 Manual

    This circuit board is used to provide emulation functions when it is installed in the ICE (S5U1C88000H5), a debugging tool for the 8-bit Single Chip Microcomputer S1C88 Family. The explanation assumes that the S1C88650 circuit data has been downloaded into the S1C88 Family Peripheral Circuit Board (S5U1C88000P1).
  • Page 172 APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) (1) SW1 When downloading circuit data, set this switch to the "3" position. Otherwise, set to position "1". (2) LCDVCC (on the back of the S5U1C88000P1 board) The internal power voltage (V driver can be varied using the DIP switch as shown in Table A.1.1.

  • Page 173: Precautions

    APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) (21) LED 13 (Reserved) Unused. (22) LED 14 (OSC1 operating clock) The OSC1 operating clock is connected to this LED. The corresponding monitor pin (pin 14) can be used to check the OSC1 clock frequency.
  • Page 174 APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) Pull-up resistance value The pull-up resistance values on this board are set to 300 k which differ from those for the actual IC. For the resistance values on the actual IC, refer to Chapter 8, "ELECTRICAL CHARACTERISTICS".
  • Page 175 APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) Oscillation circuit • The OSC1 crystal oscillation frequency is fixed at 32.768 kHz. • The OSC1 CR oscillation frequency can be adjusted in the range of approx. 20 kHz to 500 kHz using the control on the S5U1C88000P1 front panel.

  • Page 176: Connecting To The Target System

    APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) A.3 Connecting to the Target System This section explains how to connect the S5U1C88000P1&S5U1C88649P2 to the target system. Note: Turn the power of all equipment off before connecting or disconnecting cables.
  • Page 177 APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) I/O connector pin assignment Table A.3.1 I/O #1 connector 40-pin CN1-1 Pin name (3.3 V) (3.3 V) N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C.
  • Page 178 APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) Table A.3.3 I/O #3 connector 20-pin CN3-1 Pin name K03(BREQ) K04/EXCL0 K05/EXCL1 K06/EXCL2 K07/EXCL3 N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. 20-pin CN3-2 50-pin CN4-1 Pin name...

  • Page 179: Product Specifications

    APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650) A.4 Product Specifications The components specifications of the S5U1C88649P2 are listed below. S5U1C88649P2 Dimensions (mm): 184 (W) 152 (D) I/O cable (100-pin/50-pin x 2) S5U1C88649P2 connector (100-pin): KEL 8830E-100-170L Cable connector (100-pin):...

  • Page 180: Appendix B Using Kanji Font

    Seiko Epson and the purchaser. 2 The programs necessary to obtain font data from the character codes and display the font data on an LCD must be created by the user.
  • Page 181 20/F., Harbour Centre, 25 Harbour Road Wanchai, Hong Kong Phone: +852-2585-4600 Fax: +852-2827-4346 Telex: 65542 EPSCO HX EPSON TAIWAN TECHNOLOGY & TRADING LTD. 14F, No. 7, Song Ren Road, Taipei 110 Phone: 02-8786-6688 Fax: 02-8786-6660 HSINCHU OFFICE No. 99, Jiangong Rd., Hsinchu City 300...
  • Page 182 S1C88650 Technical Manual ELECTRONIC DEVICES MARKETING DIVISION EPSON Electronic Devices Website http://www.epsondevice.com Document code: 404824700 Issue January, 2004 Printed in Japan...

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