0X5022: Stopwatch Timer Interrupt Mask Register (Swt_Imsk) - Epson S1C17704 Technical Manual

0x5022: Stopwatch Timer Interrupt Mask Register (SWT_IMSK)

Register name Address Bit
Stopwatch 0x5022 D7–3 –
Timer Interrupt (8 bits)
D2
Mask Register
D1
(SWT_IMSK)
D0
This register enables or disables the interrupt requests by the stopwatch timer 100 Hz, 10 Hz, and 1 Hz signals,
individually. Setting SIE∗ bit to 1 enables the stopwatch timer interrupt request by the falling edge of the
corresponding signal; setting it to 0 disables the interrupt.
In addition, it is necessary to set the stopwatch timer interrupt enable bit in the ITC to interrupt enabled to actually
generate an interrupt.
D[7:3] Reserved
D2 SIE1: 1 Hz Interrupt Enable Bit
Enables/disables the 1 Hz interrupt.
1 (R/W): Enable interrupt
0 (R/W): Disable interrupt (default)
D1 SIE10: 10 Hz Interrupt Enable Bit
Enables/disables the 10 Hz interrupt.
1 (R/W): Enable interrupt
0 (R/W): Disable interrupt (default)
D0 SIE100: 100 Hz Interrupt Enable Bit
Enables/disables the 100 Hz interrupt.
1 (R/W): Enable interrupt
0 (R/W): Disable interrupt (default)
S1C17704 TECHNICAL MANUAL
Name Function
reserved
SIE1 1 Hz interrupt enable
SIE10 10 Hz interrupt enable
SIE100 100 Hz interrupt enable
EPSON
16 STOPWATCH TIMER (SWT)
Setting Init. R/W
–
1 Enable 0 Disable
1 Enable 0 Disable
1 Enable 0 Disable
Remarks
– – 0 when being read.
0 R/W
0 R/W
0 R/W
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