Table of Contents
Advertisement
22 LCD DRIVER (LCD)
Address
Bit
(upper 16 bits)
0x00 ···
0x0f
D0
D1
D2
D3
0x800∗∗
D4
D5
D6
D7
D0
D1
D2
D3
0x801∗∗
D4
D5
D6
D7
D0
D1
D2
D3
0x802∗∗
D4
D5
D6
D7
D0
D1
D2
D3
0x803∗∗
D4
D5
D6
D7
D0
D1
D2
D3
0x804∗∗
D4
D5
D6
D7
D0
D1
D2
D3
0x805∗∗
D4
D5
D6
D7
SEGREV = 1
SEG0
···
SEG15
SEGREV = 0
SEG71
···
SEG56
Selecting a display area (when 1/16 duty is selected)
When 1/16 duty is selected for the drive duty, two screen areas are reserved in the display memory and the area
to be displayed can be selected using DSPAR (D5/LCD_DCTL register). When DSPAR is set to 0, display area
0 is selected; when it is set to 1, display area 1 is selected.
∗ DSPAR: Display Memory Area Control Bit in the LCD Display Control (LCD_DCTL) Register (D5/0x50a0)
SEG pin assignments
The memory allocation for the SEG pins can be reversed using SEGREV (D7/LCD_DCTL register). When
SEGREV is 1 (default), the display memory addresses are allocated to the SEG pins in ascending order; when
SEGREV is set to 0, the addresses are allocated in descending order. (See Figures 22.5.1 and 22.5.2.)
∗ SEGREV: Segment Output Assignment Control Bit in the LCD Display Control (LCD_DCTL) Register
(D7/0x50a0)
COM pin assignments
The memory allocation for the COM pins can be reversed using COMREV (D6/LCD_DCTL register). When
COMREV is 1 (default), the display memory bits are allocated to the COM pins in ascending order; when
COMREV is set to 0, the addresses are allocated in descending order. (See Figures 22.5.1 and 22.5.2.)
∗ COMREV: Common Output Assignment Control Bit in the LCD Display Control (LCD_DCTL) Register
(D6/0x50a0)
22-8
Address (lower 8 bits)
0x10 ···
0x1f
0x20 ···
0x2f
Display area 0 (DSPAR = 0)
Display area 1 (DSPAR = 1)
SEG16
···
SEG31
SEG32
···
SEG47
SEG48
SEG55
···
SEG40
SEG39
···
SEG24
SEG23
Figure 22.5.2 Display Memory Map (for 1/16 duty)
0x30 ···
0x3f
0x40 ··· 0x47
0x48 ···
Unused area
(general-purpose
···
SEG63
SEG64
···
SEG71
···
SEG8
SEG7
···
SEG0
EPSON
COMREV
0x5f
0x60 ···
0xff
= 1
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
Not
COM8
implemented
COM9
memory)
COM10
COM11
COM12
COM13
COM14
COM15
S1C17704 TECHNICAL MANUAL
COMREV
= 0
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
COM0
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
COM0
Advertisement
Table of Contents
