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MF1045 - 03 CMOS 4 - BIT SINGLE CHIP MICROCOMPUTER S1C60N03 Technical Manual S1C60N03 Technical Hardware...
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No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any...
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The information of the product number change Starting April 1, 2001, the product number will be changed as listed below. To order from April 1, 2001 please use the new product number. For further information, please contact Epson sales representative.
CHAPTER NTRODUCTION The S1C60N03 Series single-chip microcomputer features an S1C6200B CMOS 4-bit CPU as the core. It contains a 768 (words) × 12 (bits) ROM, 64 (words) × 4 (bits) RAM, LCD driver , 4-bit input port (K00– K03), 4-bit output port (R00–R03) and a timer.
LCD segment output or DC output terminal * COM0–3 17–20 LCD common output terminal (1/4, 1/3 or 1/2 duty are selectable *) RESET Initial reset input terminal TEST Test input terminal ∗ Can be selected by mask option EPSON S1C60N03 TECHNICAL MANUAL...
The voltage doubler/halver is not used. In the S1C60N03, this selection can reduce the external component count. When 1/2 bias (B) is selected in the S1C60N03, the voltage halver is used to generate V and V and the power divider is disconnected.
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V –V are shorted internally. Note: –V and V –V are shorted internally. Fig. 2.1.2 Power circuit configuration of S1C60N03 S1C60L03 3 V LCD Panel 1/4, 1/3 or 1/2 duty, 1/3 bias = 1/3·V Voltage 1.5 V doubler = 2/3·V = 2·V...
CHAPTER 2: POWER SUPPLY AND INITIAL RESET 2.2 Initial Reset To initialize the S1C60N03 Series circuits, an initial reset must be executed. There are three ways of doing this. (1) Initial reset by the oscillation detection circuit (Note) (2) External initial reset via the RESET terminal (3) External initial reset by simultaneous high input to K00–K03 (depending on mask option)
16 × 4 Display memory Undefined ∗ Other peripheral circuits – ∗ See Section 4.1, "Memory Map". 2.3 Test Terminal (TEST) This terminal is used when IC is inspected for shipment. During normal operation connect it to V EPSON S1C60N03 TECHNICAL MANUAL...
Note the following points with regard to the S1C60N03 Series: (1) Since the S1C60N03 Series don't provides the SLEEP function, the SLP instruction can not be used. (2) Because the ROM capacity is 768 words, 12 bits per word, bank bits are unnecessary, and PCB and NBP are not used.
4.1 Memory Map The data memory of the S1C60N03 Series has an address space of 89 words, of which 16 words are allocated to display memory and 9 words, to I/O memory. Figure 4.1.1 show the overall memory map for the S1C60N03 Series, and Table 4.1.1, the memory maps for the peripheral circuits (I/O space).
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∗3 ∗2 – – – Unused CSDC Static Dynamic LCD drive switch ∗1 ∗3 Initial value at initial reset Always "0" being read ∗2 ∗4 Not set in the circuit Reset (0) immediately after being read EPSON S1C60N03 TECHNICAL MANUAL...
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Oscillation Circuit) 4.2 Oscillation Circuit The S1C60N03 Series has a built-in oscillation circuit that generates the operating clock of the CPU and the peripheral circuit. Either crystal oscillation or CR oscillation can be selected for the oscillation circuit by mask option.
4.3 Input Ports (K00–K03) 4.3.1 Configuration of input port The S1C60N03 Series has a 4-bit general-purpose input port. Each of the input port terminals (K00–K03) has an internal pull-down resistor. The pull-down resistor can be selected for each bit with the mask option.
The mask option enables selection of the noise rejection circuit for each separate terminal series. When "use" is selected, a maximum delay of 0.5 msec (fosc = 32 kHz) occurs from the time an interrupt condition is established until the interrupt factor flag (IK0) is set to 1. EPSON S1C60N03 TECHNICAL MANUAL...
When modifying the input port from high level to low level with pull-down resistor, a delay will occur at the fall of the waveform due to time constant of the pull-down resistor and input gate capacities. Provide appropriate waiting time in the program when performing input port reading. EPSON S1C60N03 TECHNICAL MANUAL...
4.4 Output Ports (R00–R03) 4.4.1 Configuration of output port The S1C60N03 Series has a 4-bit general output port (R00–R03). Output specification of the output port can be selected in a bit units with the mask option. Two kinds of output specifications are available: complementary output and Pch open drain output. Also, the mask option enables the output ports R00 and R01 to be used as special output ports.
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The BUZZER signal is controlled by the R00 register and the BUZZER signal is controlled by the R01 register. The frequency of buzzer output may be selected by software to be either 2 kHz or 4 kHz. EPSON S1C60N03 TECHNICAL MANUAL...
XFOUT0, XFOUT1: FOUT frequency control (0F7H•D0, D1) Selects the output frequency when the R00 port is set for FOUT output. Table 4.4.3.2 FOUT frequency selection XFOUT1 XFOUT0 Frequency selected After an initial reset, these registers are set to 0. EPSON S1C60N03 TECHNICAL MANUAL...
When 1 is written to this register, the frequency is set in 2 kHz, and in 4 kHz when 0 is written. After an initial reset, this register is set to 0. 4.4.4 Programming note The buzzer or FOUT signal may produce hazards when the output ports R00 and R01 are turned on or off. EPSON S1C60N03 TECHNICAL MANUAL...
4.5.1 Configuration of LCD driver The S1C60N03 Series has four common terminals and 15 (SEG0–SEG14) segment terminals, so that an LCD with a maximum of 60 (15 × 4) segments can be driven. The power for driving the LCD is generated by the CPU internal circuit, so there is no need to supply power externally.
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CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver) LCD status COM0 COM0 COM1 COM2 COM1 COM3 COM2 SEG0–14 COM3 SEG0 –SEG14 Frame frequency Fig. 4.5.1.1 Drive waveform for 1/4 duty (1/3 bias) EPSON S1C60N03 TECHNICAL MANUAL...
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COM3 SEG0 –SEG14 Frame frequency Fig. 4.5.1.2 Drive waveform for 1/3 duty (1/3 bias) LCD status COM0 COM0 COM1 COM1 SEG0–14 COM2 COM3 SEG0 –SEG14 Frame frequency Fig. 4.5.1.3 Drive waveform for 1/2 duty (1/3 bias) EPSON S1C60N03 TECHNICAL MANUAL...
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver) 4.5.2 Cadence adjustment of oscillation frequency In the S1C60N03 Series, the LCD drive duty can be set to 1/1 duty by software. This function enables easy adjustment (cadence adjustment) of the oscillation frequency of the oscillation circuit.
Note: The terminal pairs are the combination of SEG (2 ∗ n) and SEG (2 ∗ n + 1) (where n is an integer from 0 to 6). (4) Drive bias For the drive bias, either 1/3 bias or 1/2 bias can be selected by the mask option. EPSON S1C60N03 TECHNICAL MANUAL...
Because the display memory is for writing only, re-writing the contents with computing instructions (e.g., AND, OR, etc.) which come with read-out operations is not possible. To perform bit operations, a buffer to hold the display data is required on the RAM. EPSON S1C60N03 TECHNICAL MANUAL...
4.6.1 Configuration of clock timer The S1C60N03 Series has a built-in clock timer that uses the oscillation circuit as the clock source. The clock timer is configured as a 7-bit binary counter that counts with a 256 Hz source clock from the divider.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to 1, an interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will not be generated. Be very careful when interrupt factor flags are in the same address. EPSON S1C60N03 TECHNICAL MANUAL...
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT) 4.7 Interrupt and HALT The S1C60N03 Series provides the following interrupt settings, each of which is maskable. External interrupt: Input port interrupt (one) Internal interrupt: Timer interrupt (one) To enable interrupts, the interrupt flag must be set to 1 (EI) and the necessary related interrupt mask registers must be set to 1 (enable).
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to 1, an interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will not be generated. Be very careful when interrupt factor flags are in the same address. EPSON S1C60N03 TECHNICAL MANUAL...
Note: Use a 1 µF capacitor for C and C when "S1C60L03 1/3 bias" is selected, or a 0.1 µF capacitor when "S1C60N03 1/2 bias" or "S1C60L03 1/2 bias (A), (B)" is selected. No capacitor is required for C and C when another specification is selected.
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Note: Use a 1 µF capacitor for C and C when "S1C60L03 1/3 bias" is selected, or a 0.1 µF capacitor when "S1C60N03 1/2 bias" or "S1C60L03 1/2 bias (A), (B)" is selected. No capacitor is required for C and C when another specification is selected.
S1C60L03 ( Ta=-20 to 70°C ) Item Symbol Condition Min. Typ. Max. Unit Supply voltage -2.0 -1.5 -1.2 Oscillation frequency Crystal oscillation 32.768 CR oscillation, R =470kΩ µF Booster capacitor µF Capacitor betwen V and V EPSON S1C60N03 TECHNICAL MANUAL...
CHAPTER 6: ELECTRICAL CHARACTERISTICS 6.4 Analog Circuit Characteristics and Current Consumption S1C60N03 (Crystal Oscillation) Unless otherwise specified: =0V, V =-3.0V, f =32.768kHz, Ta=25°C, C =25pF, V is internal voltage, C =0.1µF Item Symbol Condition Min. Typ. Max. Unit LCD drive voltage Connect 1 MΩ...
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CHAPTER 6: ELECTRICAL CHARACTERISTICS S1C60N03 (CR Oscillation) Unless otherwise specified: =0V, V =-3.0V, f =65kHz, Ta=25°C, R =470kΩ, V is internal voltage, C =0.1µF Item Symbol Condition Min. Typ. Max. Unit LCD drive voltage Connect 1 MΩ load resistor between V 1/3·V...
CHAPTER 6: ELECTRICAL CHARACTERISTICS 6.5 Oscillation Characteristics Oscillation characteristics will vary according to different conditions (elements used, board pattern). Use the following characteristics are as reference values. S1C60N03 Crystal Oscillation Unless otherwise specified: =0V, V =-3.0V, f =32.768kHz, Crystal: Q13MC146, C =25pF, C =built-in, Ta=25°C...
Bypass capacitor connection example (3) Components which are connected to the V terminal, such as a capacitor, should be connected in the shortest line. EPSON S1C60N03 TECHNICAL MANUAL...
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(1) Design the product and implement the IC on the board so that it is shielded from visible radiation in actual use. (2) The inspection process of the product needs an environment that shields the IC from visible radiation. (3) As well as the face of the IC, shield the back and side too. EPSON S1C60N03 TECHNICAL MANUAL...
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