0X5345: Remc Length Counter Register (Remc_Lcnt) - Epson S1C17704 Technical Manual

Cmos 16-bit single chip microcomputer
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21 REMOTE CONTROLLER (REMC)

0x5345: REMC Length Counter Register (REMC_LCNT)

Register name Address
Bit
REMC Length
0x5345
D7–0 REMLEN[7:0] Transmit/receive data length count
Counter Register
(8 bits)
(REMC_LCNT)
D[7:0]
REMLEN[7:0]: Transmit/Receive Data Length Count Bits
Sets the data length counter value to start the counter. (Default: 0x0)
The counter stops when it reaches 0 and generates a cause of underflow interrupt.
During data transmission
During data transmission, set the transmit data.
By writing a value equivalent to the data pulse width to this register, the data length counter starts
counting down from the set value and stops after generating a cause of underflow interrupt when the
counter reaches 0.
The next transmit data can be set using this interrupt.
During data reception
During data reception, an interrupt can be generated at the rising edge and falling edge of the input
signal. Use an input transition interrupt to set the data length counter to 0xff and read the counter value
when the next interrupt caused by an input transition occurs. The input data pulse width can be obtained
from the difference between 0xff and the read value.
21-16
Name
Function
(down counter)
EPSON
Setting
Init. R/W
0x0 to 0xff
0x0 R/W
S1C17704 TECHNICAL MANUAL
Remarks

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