Vector Table - Epson S1C17704 Technical Manual

Cmos 16-bit single chip microcomputer
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6 INTERRUPT CONTROLLER (ITC)

6.2 Vector Table

The vector table contains the vectors to the interrupt handler routines (handler routine start address) that will be
read by the S1C17 Core to execute the handler when an interrupt occurs.
The vector table is located at address 0x8000 in the S1C17704. The vector table base address can be read out from
TTBR (Vector Table Base Register) located at address 0xffff80.
Table 6.2.1 shows the vector table of the S1C17704.
Vector No.
Vector address
Software interrupt No.
0 (0x00)
0x8000
1 (0x01)
0x8004
(0xfffc00)
2 (0x02)
0x8008
3 (0x03)
0x800c
4 (0x04)
0x8010
5 (0x05)
0x8014
6 (0x06)
0x8018
7 (0x07)
0x801c
8 (0x08)
0x8020
9 (0x09)
0x8024
10 (0x0a)
0x8028
11 (0x0b)
0x802c
12 (0x0c)
0x8030
13 (0x0d)
0x8034
14 (0x0e)
0x8038
15 (0x0f)
0x803c
16 (0x10)
0x8040
17 (0x11)
0x8044
18 (0x12)
0x8048
19 (0x13)
0x804c
20 (0x14)
0x8050
:
31 (0x1f)
0x807c
∗1 When the same interrupt level is set
∗2 Either reset or NMI can be selected as the watchdog timer interrupt with software.
Vector numbers 4 to 19 are assigned to the maskable interrupts supported by the S1C17704.
6-2
Table 6.2.1 Vector Table
Hardware interrupt name
Reset
Address misaligned interrupt
Debugging interrupt
NMI
reserved
P0 port interrupt
P1 port interrupt
Stopwatch timer interrupt
Clock timer interrupt
8-bit OSC1 timer interrupt
SVD interrupt
LCD interrupt
PWM & capture timer interrupt
8-bit timer interrupt
16-bit timer Ch.0 interrupt
16-bit timer Ch.1 interrupt
16-bit timer Ch.2 interrupt
UART interrupt
Remote controller interrupt
SPI interrupt
2
I
C interrupt
reserved
:
:
reserved
Cause of hardware interrupt
• Low input to the #RESET pin
• Watchdog timer overfl ow
Memory access instruction
brk instruction, etc.
Watchdog timer overfl ow
P00–P07 port inputs
P10–P17 port inputs
• 100 Hz timer signal
• 10 Hz timer signal
• 1 Hz timer signal
• 32 Hz timer signal
• 8 Hz timer signal
• 2 Hz timer signal
• 1 Hz timer signal
Compare match
Low supply voltage detected
Frame signal
• Compare match A
• Compare match B
Timer underfl ow
Timer underfl ow
Timer underfl ow
Timer underfl ow
• Transmit buffer empty
• Receive buffer full
• Receive error
• Data length counter underfl ow
• Input rising edge detected
• Input falling edge detected
• Transmit buffer empty
• Receive buffer full
• Transmit buffer empty
• Receive buffer full
EPSON
Priority
1
∗2
2
3
∗2
4
High
:
Low
S1C17704 TECHNICAL MANUAL
∗ 1
∗ 1

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