16-Bit Timer (Timer 0 + Timer 1); Interrupt Function - Epson S1C63656 Technical Manual

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmable Timer)

4.10.6 16-bit timer (timer 0 + timer 1)

Timers 0 and 1 can be used as a 16-bit timer.
To use the 16-bit timer, write "1" to the timer 0 16-bit mode selection register MOD16.
The 16-bit timer is configured with timer 0 for low-order byte and timer 1 for high-order byte as shown in
Figure 4.10.6.1.
Input port
K13
K13
Timer 0 Run/Stop
PTRUN0
OSC1
f
OSC1
oscillation
Selector
circuit
CKSEL0
OSC3
oscillation Divider
f
OSC3
circuit
Interrupt
TOUT
1/2
The registers for timer 0 are used to control the timer. The event counter and PWM output functions can
also be used.
Timer 1 operates with the timer 0 underflow signal as the count clock, so the clock and RUN/STOP
control registers for timer 1 become invalid. However, reload data (PTRSTx) must be preset to timers 0
and 1 separately.
The counter data in 16-bit mode must be read in the order below.
PTD00–PTD03 → PTD04–PDT07 → PTD10–PTD13 → PTD14–PTD17

4.10.7 Interrupt function

The programmable timer can generate an interrupt due to an underflow of each timer or a compare
match of timers 0 and 1. See Figures 4.10.2.1 and 4.10.5.1 for the interrupt timing.
Note: The compare match interrupt can be generated only when timer 0 or 1 is set in PWM mode.
An underflow/compare match of timer x sets the corresponding interrupt factor flag IPTx/ICTCx to "1",
and generates an interrupt. The interrupt can also be masked by setting the corresponding interrupt mask
register EIPTx/ECTCx. However, the interrupt factor flag is set to "1" by an underflow/compare match of
the corresponding timer regardless of the interrupt mask register setting.
When timers 0 and 1 are used as a 16-bit timer, an interrupt is generated by an underflow of timer 1. In
this case, IPT0 is not set to "1" by a timer 0 underflow. The compare match interrupt uses ICTC1 of timer
1.
76
Timer 0 + Timer 1
Timer 0 reset PTRST0
PTRST1
Timer 1 reset
Clock
control
Prescaler
circuit
Prescaler
setting
PTPS00
PTPS01
Timer function setting
FCSEL
Pulse polarity setting
PLPOL
Event counter mode setting
EVCNT
Compare match signal
PWM waveform
generator
Fig. 4.10.6.1 Configuration of 16-bit timer
EPSON
Timer 0 Timer 1
8 low-order bits 8 high-order bits
Reload data register Reload data register
RLD00–RLD07 RLD10–RLD17
8-bit
down counter down counter
Data buffer Data buffer
PTD00–PTD07 PTD10–PTD17
Comparator
Compare data register Compare data register
CD00–CD07 CD10–CD17
PTSEL1
PWM output selection
S1C63656 TECHNICAL MANUAL
Under-
8-bit
flow
signal