Setting Clock For Data Length Counter - Epson S1C17704 Technical Manual

21 REMOTE CONTROLLER (REMC)

21.4 Setting Clock for Data Length Counter

The data length counter is an 8-bit down counter for setting the data length for data transmission.
During data transmission, write a value equivalent to the data pulse width in this counter. The counter starts
counting down from the set value and stops after generating a cause of underflow interrupt when the counter
reaches 0.
The next transmit data can be set using this interrupt.
This counter is also used to measure the receive data length during data reception. When data is received, an
interrupt can be generated at the rising edge and falling edge of the input signal. Use an input transition interrupt to
set the data length counter to 0xff and read the counter value when the next interrupt caused by an input transition
occurs. The input data pulse width can be obtained from the difference between 0xff and the read value.
As in the case of the carrier generator, the data length counter uses a prescaler output clock as the count clock. Use
the LCCLK[3:0] bits (D[3:0]/REMC_PSC register) provided separately with the carrier generator to select one of
the 15 prescaler output clocks.
∗ LCCLK[3:0]: Length Counter Clock Select Bits in the REMC Prescaler Clock Select (REMC_PSC) Register
(D[3:0]/0x5341)
LCCLK[3:0]
0xf
0xe
0xd
0xc
0xb
0xa
0x9
0x8
The data length counter can count up to 256. Select a count clock so that the data length can be counted within this
range.
21-4
Table 21.4.1 Selecting a Data Length Counter Clock
Prescaler output clock
Reserved
PCLK•1/16384
PCLK•1/8192
PCLK•1/4096
PCLK•1/2048
PCLK•1/1024
PCLK•1/512
PCLK•1/256
EPSON
LCCLK[3:0] Prescaler output clock
0x7 PCLK•1/128
0x6 PCLK•1/64
0x5 PCLK•1/32
0x4 PCLK•1/16
0x3
0x2
0x1
0x0
S1C17704 TECHNICAL MANUAL
PCLK•1/8
PCLK•1/4
PCLK•1/2
PCLK•1/1
(Default: 0x0)