Controlling The Peripheral Module Clock (Pclk) - Epson S1C17704 Technical Manual

8.3 Controlling the Peripheral Module Clock (PCLK)

The CLG module controls clock supply to the peripheral modules.
The system clock is used as the peripheral module clock (PCLK) without dividing.
OSC3
System clock
OSC1
Controlling the clock supply
Use PCKEN[1:0] (D[1:0]/CLG_PCLK register) to control supplying PCLK.
∗ PCKEN[1:0]: PCLK Enable Bits in the PCLK Control (CLG_PCLK) Register (D[1:0]/0x5080)
These bits are set to 0x3 by default so that the clock is supplied to the peripheral modules. If all the peripheral
modules in the internal peripheral area (listed above) can be idle, disable the clock supply to reduce current
consumption.
Note: Be sure to avoid setting PCKEN[1:0] (D[1:0]/CLG_PCLK register) to 0x2 or 0x1, as some
peripheral modules will stop operating.
Peripheral modules that operate with a clock other than PCLK
The peripheral modules shown below operate with a clock other than PCLK except for accessing the control
registers. Therefore, PCLK is not necessary after the module starts operating by setting the control registers.
OSC1 peripheral modules
The clock timer, stopwatch timer, watchdog timer, and 8-bit OSC1 timer operate with a divided OSC1
clock. Although the control registers cannot be accessed for read and write when the PCLK supply is
disabled, they keep operating.
LCD driver
The LCD driver operates with the OSC1 clock or a divided OSC3 clock. Although the control registers
cannot be accessed for read and write when the PCLK supply is disabled, the LCD driver keeps refreshing
the display. Also PCLK is not necessary for accessing the display memory.
S1C17704 TECHNICAL MANUAL
On/Off control
Gate
Figure 8.3.1 Peripheral Module Clock Control Circuit
Table 8.3.1 PCLK Control
PCKEN[1:0]
0x3
0x2
0x1
0x0
EPSON
Internal peripheral modules
• Prescaler
PCLK • UART
• 8-bit timer
• 16-bit timer Ch.0–2
• Interrupt controller
• SPI
2
• I C
• SVD circuit
• Power control circuit
• P port & port MUX
• PWM & capture timer
• MISC registers
• Remote controller
• Control registers for the modules below
Clock timer
Stopwatch timer
Watchdog timer
8-bit OSC1 timer
LCD driver
PCLK supply
Enabled (On)
Not allowed
Not allowed
Disabled (Off)
(Default: 0x3)
8 CLOCK GENERATOR (CLG)
8-3