Logic Diagram - ABB REG650 Technical Manual

1MRK 502 043-UUS B
8.9.7.3
8.9.8
Technical Manual

Logic diagram

Negative sequence current
a
a>b
b
I2-1>
Operation=Enabled
BLK1
BLOCK
ANSI08000466 V3 EN
Figure 111: Simplified logic diagram for step 1 of Negative sequence time
overcurrent protection for machines (NS2PTOC, 46I2)
Step 2 for Negative sequence time overcurrent protection for machines (NS2PTOC,
46I2) is similar to step 1 above except that it lacks the inverse characteristic.
PU_ST1
PU_ST2 OR
TRST1
TRST2
OR
ANSI09000690 V3 EN
Figure 112: Simplified logic diagram for the PICKUP, ALARM and TRIP signals for
NS2PTOC (46I2)
Technical data
Table 129: NS2PTOC (46I2) technical data
Function
Operate value, step 1
and 2, negative sequence
overcurrent
Reset ratio, step 1 and 2
Operate time, pickup
Reset time, pickup
Table continues on next page
DT time
0-t1
selected
0
AND
Inverse
Inverse time
selected
Range or value
IBase
(3-500)% of
>95%
30 ms typically at 0 to 2 x I
set
20 ms typically at 0 to 10 x I
set
40 ms typically at 2 to 0 x I
set
Section 8
Current protection
OR
PU_ST1
ANSI08000466-3-en.vsd
ALARM
0-tAlarm
0
ANSI09000690-3-en.vsd
Accuracy
± 1.0% of I at I < I
n n
± 1.0% of I at I > I
n
-
-
-
TRST1
TRIP
243