Logic Diagram; Undervoltage Protection - ABB REL650 Technical Manual

Section 7
Current protection
7.10.7.4
MaxPhCurr
StartCurr
Voltage
control or
restraint
feature
MinPh-PhVoltage
IEC10000214 V1 EN-US
Figure 124: Simplified internal logic diagram for overcurrent function
IEC10000213 V1 EN-US
Figure 125: Simplified internal logic diagram for undervoltage function
7.10.7.5
256

Logic diagram

a
a>b
b
X
MinPh-phVoltage
StartVolt
Operation_UV=On
BLKUV

Undervoltage protection

The undervoltage step simply compares the magnitude of the lowest measured
phase-phase voltage quantity with the set start level. The undervoltage step starts if
the magnitude of the measured voltage quantity is lower than the set level.
The start signal starts a definite time delay. If the value of the start signal is logical
TRUE for longer than the set time delay, the undervoltage step sets its trip signal to
logical TRUE.
DEF time
selected
Inverse
Inverse
time
selected
DEF time
selected
a
b>a
b
AND
Line distance protection REL650 2.2 IEC
1MRK 506 382-UEN A
GUID-0A1565A4-74E1-4171-968B-50529AABF192 v2
TROC
OR
STOC
IEC10000214-1-en.vsd
TRUV
STUV
IEC10000213-1-en.vsd
GUID-96171DC7-9F8E-47B4-BE0D-E1B9EE214612 v5
Technical manual