Table of Contents
Advertisement
Table
Number
36-4
DSP Opcodes......................................................................................................... 36-6
36-5
SDSR/SDMR Field Descriptions .......................................................................... 36-7
36-6
FIR Parameter Packet ............................................................................................ 36-8
36-7
FIR1 Coefficient, Input, and Output Buffers......................................................... 36-9
36-8
FIR1 Parameter Packet .......................................................................................... 36-9
36-9
FIR2 Coefficient, Input, and Output Buffers....................................................... 36-11
36-10
FIR2 Parameter Packet ........................................................................................ 36-12
36-11
FIR3 Coefficient, Input, and Output Buffers....................................................... 36-13
36-12
FIR3 Parameter Packet ........................................................................................ 36-14
36-13
FIR5 Coefficient, Input, and Output Buffers....................................................... 36-15
36-14
FIR5 Parameter Packet ........................................................................................ 36-16
36-15
FIR6 Coefficient, Input, and Output Buffers....................................................... 36-18
36-16
FIR6 Parameter Packet ........................................................................................ 36-18
36-17
IIR Coefficient, Input, and Output Buffers ......................................................... 36-20
36-18
IIR Parameter Packet ........................................................................................... 36-20
36-19
MOD Table, Input, and Output Buffers .............................................................. 36-21
36-20
MOD Parameter Packet....................................................................................... 36-22
36-21
DEMOD Modulation Table, Input, and Output Buffers ..................................... 36-23
36-22
DEMOD Parameter Packet.................................................................................. 36-24
36-23
LMS1 Coefficients and Input Buffers ................................................................. 36-25
36-24
DEMOD Parameter Packet.................................................................................. 36-26
36-25
LMS2 Coefficients and Input Buffers ................................................................. 36-27
36-26
LMS2 Parameter Packet ...................................................................................... 36-28
36-27
WADD Modulation Table and Sample Data Buffers.......................................... 36-29
36-28
WADD Parameter Packet.................................................................................... 36-29
36-29
WADD Applications ........................................................................................... 36-30
36-30
DSP Function Execution Times .......................................................................... 36-33
37-1
Fetch Show Cycles Control ................................................................................... 37-3
37-2
Status Pin Groupings ............................................................................................. 37-3
37-3
VF Pins Encoding: Instruction Queue Flushes...................................................... 37-4
37-4
VF Pins Encoding: Instruction Fetch Types.......................................................... 37-4
37-5
Detecting the Trace Buffer Start Point .................................................................. 37-7
37-6
Instruction Watchpoints Programming Options.................................................. 37-12
37-7
Load/Store Data Events....................................................................................... 37-14
37-8
Load/Store Watchpoints Programming Options ................................................. 37-14
37-9
Checkstop State and Debug Mode ...................................................................... 37-24
37-10
Trap Enable Data Shifted into Development Port Shift Register........................ 37-31
37-11
Debug Port Command Shifted Into Development Port Shift Register................ 37-31
37-12
Status/Data Shifted Out of Development Port Shift Register ............................. 37-32
37-13
Debug Instructions/Data Shifted Into Development Port Shift Register............. 37-33
37-14
MPC860-Specific Development Support and Debug SPRs................................ 37-36
37-15
Development Support/Debug Registers Protection............................................. 37-37
37-16
CMPAÐCMPD Field Descriptions ...................................................................... 37-37
lx
TABLES
Title
MPC860 PowerQUICC UserÕs Manual
Page
Number
MOTOROLA
Advertisement
Table of Contents
