Motorola MPC860 PowerQUICC User Manual page 336

Part IV. Hardware Interface
Name Reset
GPL_A0 High
GPL_B0
OE High
GPL_A1
GPL_B1
GPL_A[2Ð3] High
GPL_B[2Ð3]
CS[2Ð3]
UPWAITA Hi-Z
GPL_A4
UPWAITB Hi-Z
GPL_B4
GPL_A5 High
PORESET
Hi-Z
RSTCONF Hi-Z
13-10
Table 13-1. Signal Descriptions (Continued)
Number Type
D7 Output
C6 Output
B5, C5 Output
C1 Bidirectional User Programmable Machine Wait AÑThis input is sampled
B1 Bidirectional User Programmable Machine Wait BÑThis input is sampled
D3 Output
R2 Input
P3 Input
MPC860 PowerQUICC UserÕs Manual
Description
General-Purpose Line 0 on UPMAÑThis output reßects the
value speciÞed in the UPMA when an external transfer to a
slave is controlled by the UPMA.
General-Purpose Line 0 on UPMBÑThis output reßects the
value speciÞed in the UPMB when an external transfer to a
slave is controlled by the UPMB.
Output EnableÑOutput asserted when the MPC860 initiates a
read access to an external slave controlled by the GPCM.
General-Purpose Line 1on UPMAÑThis output reßects the
value speciÞed in the UPMA when an external transfer to a
slave is controlled by UPMA.
General-Purpose Line 1 on UPMBÑThis output reßects the
value speciÞed in the UPMB when an external transfer to a
slave is controlled by UPMB.
General-Purpose Line 2 and 3 on UPMAÑThese outputs
reßect the value speciÞed in the UPMA when an external
transfer to a slave is controlled by UPMA.
General-Purpose Line 2 and 3 on UPMBÑThese outputs
reßect the value speciÞed in the UPMB when an external
transfer to a slave is controlled by UPMB.
Chip Select 2 and 3ÑThese outputs enable peripheral or
memory devices at programmed addresses if they are
appropriately deÞned. The double drive capability for CS2 and
CS3 is independently deÞned for each signal in the SIUMCR.
as deÞned by the user when an access to an external slave is
controlled by the UPMA.
General-Purpose Line 4 on UPMAÑThis output reßects the
value speciÞed in the UPMA when an external transfer to a
slave is controlled by UPMA.
as deÞned by the user when an access to an external slave is
controlled by the UPMB.
General-Purpose Line 4 on UPMBÑThis output reßects the
value speciÞed in the UPMB when an external transfer to a
slave is controlled by UPMB.
General-Purpose Line 5 on UPMAÑThis output reßects the
value speciÞed in the UPMA when an external transfer to a
slave is controlled by UPMA. This signal can also be controlled
by the UPMB.
Power on ResetÑWhen asserted, this input causes the
MPC860 to enter the power-on reset state.
Reset ConÞgurationÑThe MPC860 samples this input while
HRESET is asserted. If RSTCONF is asserted, the
conÞguration mode is sampled in the form of the hard reset
conÞguration word driven on the data bus. When RSTCONF is
negated, the MPC860 uses the default conÞguration mode.
Note that the initial base address of internal registers is
determined in this sequence.
MOTOROLA