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Bit
0
Field
Reset
R/W
Addr
Figure 32-11. I
Table 32-7 describes the RFCR/TFCR bit Þelds.
Bits
Name
0Ð2
Ñ
Reserved, should be cleared.
3Ð4
BO
Byte ordering. Set BO to select the required byte ordering for the buffer. If BO is changed on-the-ßy, it
takes effect at the beginning of the next frame (Ethernet, HDLC, and transparent) or at the beginning
of the next BD. See Appendix A, ÒByte Ordering.Ó
00 Reserved
01 PowerPC little-endian.
1x Big-endian or true little-endian.
5Ð7
AT[1Ð3] Address type 1Ð3. Contains the user-deÞned function code value used during the SDMA channel
memory access. AT0 is always driven high to identify this channel access as a DMA-type access.
32.6 I
C Commands
2
2
The I
C transmit and receive commands, shown in Table 32-8, are issued to the CPM
command register (CPCR).
Command
Initializes all transmit parameters in the parameter RAM to their reset state. Should be issued only
INIT TX
when the transmitter is disabled. The
PARAMETERS
both the Tx and Rx parameters.
Forces the I
CLOSE RXBD
data. If the controller is not receiving data, no action is taken. Use this command to extract data from a
partially full buffer.
Initializes all receive parameters in the parameter RAM to their reset state. Should be issued only when
INIT RX
the receiver is disabled. The
PARAMETERS
Tx and Rx parameters.
32.7 I
C Buffer Descriptor (BD) Tables
2
As shown in Figure 32-12, buffer descriptors (BDs) are organized into separate Rx and
TxBD tables in dual-port RAM. The tables have the same basic conÞguration as for the
SCCs and SMCs and form circular queues that determine the order buffers are transferred.
The CPM uses BDs to conÞrm reception and transmission or to indicate error conditions so
MOTOROLA
1
2
Ñ
I2C Base + 04 (RFCR)/I2C Base + 05 (TFCR)
2
C Function Code Registers (RFCR/TFCR)
Table 32-7. RFCR/TFCR Field Descriptions
2
Table 32-8. I
C Transmit/Receive Commands
INIT TX AND RX PARAMETERS
2
C controller to close the current Rx BD and use the next BD for subsequently received
INIT TX AND RX PARAMETERS
Chapter 32. I2C Controller
Part V. The Communications Processor Module
3
4
BO
0000_0000
R/W
Description
Description
command can also be used to reset
command can also be used to reset both the
5
6
AT[1Ð3]
7
32-11
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