Motorola MPC860 PowerQUICC User Manual page 598

Part V. The Communications Processor Module
21.2.3.3 Two TDM Channels with Static Frames
In a conÞguration with two multiplexed channels with static frames, shown in Figure 21-6,
there are 32 entries for Tx data/strobe routing and 32 entries for Rx data/strobe routing for
each TDM channel.
SI RAM Address: 0
(32-Bit Entries)
127
256
383
Figure 21-6. SI RAMÑTwo TDMs with Static Frames
21.2.3.4 SI RAM Dynamic Changes
The routing of a TDM channel can be changed while the SCCs and SMCs remain
connected to the TSA. Enabling dynamic changes divides the SI RAM into current-route
and work-space shadow areas.
Once the current-route RAM is programmed, the TDM channels can be enabled and SI
operation begun. New routing information can then be programmed into the shadow RAM.
Setting the channelsÕ change-shadow-RAM bits, SICMR[CSRRx, CSRTx], in the SI
command register tells the SI to activate the shadow RAM (deactivating the current-route
RAM) when the next frame sync arrives. The SI signals the user by clearing
SICMR[CSRRx, CSRTx] when the swap takes effect. These steps can be repeated with the
former current-route RAM always becoming the new shadow RAM and vice versa.
When using only one channel (TDMa) with dynamic changes, as in Figure 21-7, the initial
current-route RAM byte addresses are as follows.
¥ 0Ð127 RXa route
¥ 256Ð383 TXa route
The shadow RAMs are at addresses:
¥ 128Ð255 RXa route
¥ 384Ð511 TXa route
21-10
RDM = 10
Two Channels with Independent Rx and Tx Route
Framing Signals
L1RCLKa
32 Entries
L1RSYNCa
Rxa
Route
L1TCLKa
32 Entries
L1TSYNCa
Txa
Route
MPC860 PowerQUICC UserÕs Manual
128
32 Entries
Rxb
Route
255
384
32 Entries
Txb
Route
511
Framing Signals
L1RCLKb
L1RSYNCb
L1TCLKb
L1TSYNCb
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