Motorola MPC860 PowerQUICC User Manual page 989

Table 37-19 describes BAR Þelds,
Bits Name
0Ð31 BARV
37.5.1.3 Instruction Support Control Register (ICTRL)
The instruction support control register (ICTRL), shown in Figure 37-18, is used to
conÞgure instruction breakpoint operations.
Bit 0 1 2 3
Field CTA
Bit 16 17 18 19
Field IW2 IW3 SIW0EN SIW1EN SIW2EN SIW3EN DIW0EN DIW1EN DIW2EN DIW3EN IFM ISCT_SER
Reset
R/W
SPR
Figure 37-18. Instruction Support Control Register (ICTRL)
Table 37-20 describes ICTRL Þelds.
Bits Name
0Ð2 CTA Compare type of comparator AÐD
0xx Not active (reset value)
3Ð5 CTB
100 Equal
101 Less than
6Ð8 CTC
110 Greater than
111 Not equal
9Ð11 CTD
12Ð13 IW0 Instruction Þrst watchpoint programming.
0x Not active (reset value)
10 Match from comparator A
11 Match from comparators (A & B)
14Ð15 IW1 Instruction second watchpoint programming.
0x Not active (reset value)
10 Match from comparator B
11 Match from comparators (A | B)
16Ð17 IW2 Instruction third watchpoint programming.
0x Not active (reset value)
10 Match from comparator C
11 Match from comparators (C & D)
18Ð19 IW3 Instruction fourth watchpoint programming.
0x Not active (reset value)
10 Match from comparator D
11 Match from comparators (C | D)
MOTOROLA
Table 37-19. BAR Field Descriptions
The address of the load/store cycle that generated the breakpoint.
4 5 6
CTB
20 21 22
0000_0000_0000_0000
Table 37-20. ICTRL Field Descriptions
Chapter 37. System Development and Debugging
Description
7 8 9
CTC
23 24 25
R/W
158
Description
Part VI. Debug and Test
10 11 12 13 14 15
CTD IW0
26 27 28 29 30 31
IW1
37-39