Motorola MPC860 PowerQUICC User Manual page 397

15.2 The Clock Module
The clock module consists of two external reference sources and a programmable
phase-locked loop, arranged as shown in Figure 15-2.
EXTAL
EXTCLK
OSC
15.2.1 External Reference Clocks
The MPC860 has two input clock sources, provided at the EXTAL pin or at the EXTAL and
XTAL pins. These two clock sources can select to drive three internal clock signals,
referred to as OSCCLK, PITRTCLK, and TMBCLK. OSCCLK provides the input clock to
the phase-locked loop. PITRTCLK and TMBCLK provide dedicated clocks for special
system timer circuitry, which includes the periodic interrupt timer (PIT), real-time clock
(RTC), timebase (TB), and decrementer (DEC) in the SIU. These separate clock sources for
the PIT, RTC, TB, and DEC are provided to enable these modules to continue to count at a
Þxed, user-deÞned rate regardless of system frequency.
The clock sources for OSCCLK, PITRTCLK, and TMBCLK are selected at reset. The
sources for PITRTCLK and TMBCLK can also be selected in software by manipulation of
the SCCR control register. For more information, see Section 15.2.2.1, ÒSPLL Reset
ConÞgurationÓ, Section 15.3.2, ÒThe PIT and RTC Clock (PITRTCLK)Ó, and
Section 15.3.3, ÒThe Time Base and Decrementer Clock (TMBCLK)Ó.
It is possible to use both clock sources in a system, with each providing reference for
different functions. If either reference source is not used, then its input should be grounded.
It is not recommended to select the crystal oscillator circuit as OSCCLK while also driving
a high-frequency clock source on EXTCLK. This is because noise from the EXTCLK clock
source will couple into the crystal oscillator circuit, and will in many cases not allow the
system phase-locked loop (SPLL) to lock. The converse, however, is allowable; EXTCLK
MOTOROLA
Crystal
XFC
XTAL XFC
OSCM
Figure 15-2. Clock Module Components
Chapter 15. Clocks and Power Control
Part IV. Hardware Interface
V DD
0.1 m F
XFC
V SSSYN
V DDSYN
SPLL
MPC860
V SSSYN1
CLKOUT
15-3