Motorola MPC860 PowerQUICC User Manual page 558

Part V. The Communications Processor Module
When the core or SDMA channel access the dual-port RAM, the data and address are
passed through the U-bus. The CP can fetch data from the entire dual-port RAM and
microcode instructions from portions of the system RAM.
The controller and sub-block parameters of the parameter RAM and the optional microcode
packages in system RAM use Þxed addresses. The buffer descriptors, buffers, and
scratchpad area, however, can be located in any unused dual-port RAM area. See
Figure 19-5.
ERAM = 10Ð
ERAM = 11Ð
19.6.1 System RAM and Microcode Packages
When optional Motorola-supplied RAM microcode packages are activated, certain portions
of the system RAM are no longer available. Depending on the memory requirements of the
microcode package, some or all of the shaded areas of Figure 19-5 become locked. Reads
to locked areas return all ones. The unshaded 1,536-byte area of system RAM is always
available to the user.
The enable-RAM-microcode Þeld of the RISC conÞguration register, RCCR[ERAM],
selects the three possible conÞgurations for microcode area sizesÑÞrst 512-byte block,
Þrst two 512-byte blocks, or Þrst four 512-byte blocks. When just the Þrst and/or second
512-byte blocks are used for microcode, the last 256-byte extension of system RAM is also
19-10
0 KbyteÐ
ERAM = 01Ð
1 KbyteÐ
2 KbyteÐ
3 KbyteÐ
4 KbyteÐ
5 KbyteÐ
6 KbyteÐ
7 KbyteÐ
8 KbyteÐ
Figure 19-5. Dual-Port RAM Memory Map
MPC860 PowerQUICC UserÕs Manual
IMMR + 0x2000
BD/Data/mCode
IMMR + 0x2200
BD/Data/mCode
IMMR + 0x2400
BD/Data/mCode
IMMR + 0x2800
BD/Data
IMMR + 0x2E00 or IMMR + 0x2F00
BD/Data/mCode
IMMR + 0x3000
(Not Implemented)
IMMR + 0x3C00
Parameter RAM
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