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Table 9-21. MD_RAM1 Field Descriptions (Continued)
Bits
Name
19
SA
Supervisor access
0 Subpage 0 (address[20Ð21] = 00) Supervisor access is not permitted
1 Subpage 0 (address[20Ð21] = 00) Supervisor access is permitted
20
0 Subpage 1 (address[20Ð21] = 01) Supervisor access is not permitted
1 Subpage 1 (address[20Ð21] = 01) Supervisor access is permitted
21
0 Subpage 2 (address[20Ð21] = 10) Supervisor access is not permitted
1 Subpage 2 (address[20Ð21] = 10) Supervisor access is permitted
22
0 Subpage 3 (address[20Ð21] = 11) Supervisor access is not permitted
1 Subpage 3 (address[20Ð21] = 11) Supervisor access is permitted
23
SAT
Supervisor access type
0 Supervisor access type is read only
1 Supervisor access type is read/write
24
URP0
User read permission page zero
0 Subpage 0 (address[20Ð21] = 00) User read access is not permitted
1 Subpage 0 (address[20Ð21] = 00) User read access is permitted
25
UWP0 User write permission page zero
0 Subpage 0 (address[20Ð21] = 00) User write access is not permitted
1 Subpage 0 (address[20Ð21] = 00) User write access is permitted
26
URP1
0 Subpage 1 (address[20Ð21] = 01) User read access is not permitted
1 Subpage 1 (address[20Ð21] = 01) User read access is permitted
27
UWP1 0 Subpage 1 (address[20Ð21] = 01) User write access is not permitted
1 Subpage 1 (address[20Ð21] = 01) User write access is permitted
28
URP2
0 Subpage 2 (address[20Ð21] = 10) User read access is not permitted
1 Subpage 2 (address[20Ð21] = 10) User read access is permitted
29
UWP2 0 Subpage 2 (address[20Ð21] = 10) User write access is not permitted
1 Subpage 2 (address[20Ð21] = 10) User write access is permitted
30
URP3
0 Subpage 3 (address[20Ð21] = 11) User read access is not permitted
1 Subpage 3 (address[20Ð21] = 11) User read access is permitted
31
UWP3 0 Subpage 3 (address[20Ð21] = 11) User write access is not permitted
1 Subpage 3 (address[20Ð21] = 11) User write access is permitted
MOTOROLA
Chapter 9. Memory Management Unit (MMU)
Part II. PowerPC Microprocessor Module
Description
9-31
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