Table of Contents
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Paragraph
Number
2
32.1
I
C Features ........................................................................................................32-2
2
32.2
I
C Controller Clocking and Signal Functions...................................................32-2
2
32.3
I
C Controller Transfers .....................................................................................32-3
2
32.3.1
I
C Master Write (Slave Read).......................................................................32-3
2
32.3.2
I
C Loopback Testing ....................................................................................32-4
2
32.3.3
I
C Master Read (Slave Write).......................................................................32-4
2
32.3.4
I
C Multi-Master Considerations ...................................................................32-5
2
32.4
I
C Registers.......................................................................................................32-6
2
32.4.1
I
C Mode Register (I2MOD)..........................................................................32-6
2
32.4.2
I
C Address Register (I2ADD) ......................................................................32-7
2
32.4.3
I
C Baud Rate Generator Register (I2BRG) ..................................................32-7
2
32.4.4
I
C Event/Mask Registers (I2CER/I2CMR) ..................................................32-8
2
32.4.5
I
C Command Register (I2COM) ..................................................................32-8
2
32.5
I
C Parameter RAM ...........................................................................................32-9
2
32.6
I
C Commands .................................................................................................32-11
2
32.7
I
C Buffer Descriptor (BD) Tables ..................................................................32-11
2
32.7.1
I
C Buffer Descriptors (BDs).......................................................................32-12
2
32.7.1.1
I
2
32.7.1.2
I
33.1
Features...............................................................................................................33-1
33.2
Core Control vs. CP Control...............................................................................33-2
33.2.1
Core Control ...................................................................................................33-2
33.2.2
CP Control ......................................................................................................33-2
33.3
The PIP Parameter RAM....................................................................................33-3
33.3.1
PIP Transmitter Parameter RAM ...................................................................33-3
33.3.1.1
PIP Function Code Register (PFCR)..........................................................33-4
33.3.1.2
Status Mask Register (SMASK).................................................................33-4
33.3.2
PIP Receiver Parameter RAM........................................................................33-5
33.3.2.1
Control Character Table, RCCM, and RCCR ............................................33-6
33.4
The PIP Registers ...............................................................................................33-7
33.4.1
PIP Configuration Register (PIPC) ................................................................33-7
33.4.2
PIP Event Register (PIPE)..............................................................................33-9
33.4.3
PIP Mask Register ........................................................................................33-10
33.4.4
PIP Timing Parameters Register (PTPR) .....................................................33-10
33.4.5
The Port B Registers.....................................................................................33-10
xxviii
CONTENTS
Chapter 32
2
I
C Controller
C Receive Buffer Descriptor (RxBD) ...................................................32-12
C Transmit Buffer Descriptor (TxBD) ..................................................32-13
Chapter 33
Parallel Interface Port
MPC860 PowerQUICC UserÕs Manual
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MOTOROLA
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