Motorola MPC860 PowerQUICC User Manual page 267

GCLK1
Fetch
Decode
Read + Execute
Writeback
L Address Drive
L Data
Load Writeback
Branch Decode
Branch Execute
10.1.7 Branch Prediction
In this example, the blt instruction is dependent on the cmpi instruction. Nevertheless, the
BPU predicts the correct path and allows an overlap of its bubbles with those of lwz. When
cmpi writes back, the BPU reevaluates the decision. If the prediction is correct, no more
action is taken and execution continues. Instructions on the predicted path cannot be
dispatched before the condition is resolved.
while:
mulli r3,r12,r4
addi r4,3(r0)
...
lwz r12,64 (r2)
cmpi 0,r12,3
addic r6,r5,1
blt cr0,while
...
GCLK1
Fetch
Decode
Read + Execute
Writeback
L Address Drive
L Data
Load Writeback
Branch Decode
Branch Execute
Branch Final
Decision
MOTOROLA
lwz sub addic
lwz sub
lwz
lwz
Figure 10-7. Branch Folding Timing
lwz cmpi addic
lwz
lwz
lwz
Figure 10-8. Branch Prediction Timing
Chapter 10. Instruction Execution Timing
Part II. PowerPC Microprocessor Module
bl Bubble
Bubble Bubble
lwz
lwz
bl
bl
blt Bubble
cmpi
Bubble Bubble cmpi
lwz
lwz
blt
blt
mulli addi
addic mulli
sub addic mulli
sub addic
mulli addi
addic mulli
addic mulli
cmp addic
blt
10-5