Motorola MPC860 PowerQUICC User Manual page 402

Part IV. Hardware Interface
¥ Frequency jitterÑThe frequency variation of the CLKOUT pin. For small
multiplication factors (e.g. (MF+1)<10), this jitter is smaller than 0.5%. For
mid-range multiplication factors (10<(MF+1)<500), this jitter is between 0.5% and
~2%. For large multiplication factors ((MF+1)>500), the frequency jitter is 2Ð3%.
The maximum input frequency jitter on the EXTAL pin is 0.5%. If the rate of change
of the frequency at the EXTAL pin is slow (it does not jump between the minimum
and maximum values in one cycle), the maximum jitter can be 2%.
15.2.2.3 The System Phase-Locked Loop Pins (VDDSYN, VSSSYN,
VSSSYN1, XFC)
The internal frequency of the MPC860 and the output of the CLKOUT pin depend on the
quality of the input clock source and the PLPRCR[MF]. The SPLL contains the following
dedicated pins that are isolated from common power and ground.
¥ VDDSYNÑThe power supply pin for the analog SPLL circuitry. For requirements
concerning this power supply, refer to Section 15.4.3, ÒClock Synthesizer Power
(VDDSYN, VSSSYN, VSSYN1).
¥ VSSSYN and VSSSYN1ÑGround reference pins for the analog SPLL circuitry. For
requirements concerning this ground reference, refer to Section 15.4.3, ÒClock
Synthesizer Power (VDDSYN, VSSSYN, VSSYN1).
¥ XFCÑThe external Þlter capacitor pin that connects to the off-chip capacitor for the
SPLL Þlter. One terminal of the capacitor is connected to XFC while the other
terminal is connected to the VDDSYN pin.
Ñ For proper SPLL operation, the XFC capacitor must be low leakage, with a
minimum parallel parasitic resistance value of 30MW.
Ñ The value of the XFC capacitor is based on the value of the MF Þeld in the
PLPRCR. XFC should be selected so that it satisÞes both the range of values
required by the MF determined at reset and by the MF value programmed as the
Þnal operating value.
Table 15-2XFC Capacitor Values Based on the MF Field
MF Range
1 £ (MF+1) £ 4
MF > 4
Ñ Note that the these ranges are not strict cutoffs; they merely represent ranges
where the best jitter performance will be achieved. If there is no overlap between
two ranges of operation, choose the minimum or maximum value of the
recommended XFC range for the normal operating frequency of the system,
whichever is nearest the range for the other frequency.
15-8
Minimum Capacitance
XFC = [(MF+1) x 425] - 125
XFC = (MF+1) x 520
MPC860 PowerQUICC UserÕs Manual
Maximum Capacitance
XFC = [(MF+1) x 590] - 175
XFC = (MF+1) x 920
Unit
pF
pF
MOTOROLA