Motorola MPC860 PowerQUICC User Manual page 388

Part IV. Hardware Interface
MPC860
External Bus
Interface
Iwarx
S Q
R
CLKOUT
The MPC860 samples CR at the rising edge of CLKOUT. When CR is asserted, the
reservation ßag is reset. The external bus interface samples the logical value of the
reservation ßag before externally starting a bus cycle initiated by a stwcx. instruction in the
CPU core. If the reservation ßag is set, the external bus interface begins the bus cycle and
if it is reset, no bus cycle is initiated externally and this situation is reported to the CPU core.
14.4.9.2 Kill Reservation (KR)
KR is a bused signal. In order to use it, the reservation logic must only remember that one
of the bus masters has a reservation for a particular address. If another bus master writes to
the address with an instruction other than stwcx., the reservation logic remembers that the
reservation for that address was lost. When the master with the reservation subsequently
attempts an stwcx. instruction to that address, the reservation logic responds to that external
bus cycle with KR.
The advantage of KR is that it is cheaper and easier to implement.
Figure 14-28 shows the reservation protocol for a multi-level (local) bus. The system
describes a situation in which the reserved location is in the remote bus.
14-36
AT[0Ð3], RSV, R/W, TS
Enable
External
stwcx.
Access CR
Figure 14-27. Reservation On Local Bus
MPC860 PowerQUICC UserÕs Manual
External Bus
A[0Ð31]
Reservation
Logic
Other
Bus
Master
CR
MOTOROLA