Motorola MPC860 PowerQUICC User Manual page 578

Part V. The Communications Processor Module
20.3.4.2 Auto-Buffering and Buffer-Chaining
Buffer-chaining is designed to move large amounts of noncontiguous blocks of data. Even
though each block needs a separate BD, the BDs can be chained together and serviced as a
group. Auto-buffering is used to repeatedly service a BD chain. Note that a chain can range
from one BD to the whole BD table in length.
Setting the CM bit (continuous mode) in a BDÕs status-and-control Þeld enables
auto-buffering; clearing the CM bit enables buffer-chaining (normal mode). The CM bit
must be explicitly programmed for each BD.
When auto-buffering, the descriptorÕs V bit will not be cleared after CPM processingÑthe
BD remains valid for immediate transfer as the current BD pointer cycles through the table.
When buffer-chaining, the CPM invalidates the current BD after processing to allow the
user (the core) to safely manipulate the contents of the buffer and modify its BD. Note that
the V bit behavior is the only difference between auto-buffering and buffer-chainingÑ
auto-buffering can be thought of as continuous buffer-chaining. One use of auto-buffering
is for continuous monitoring of an external instrument, such as an A/D converter.
Set the L bit (last) in the status-and-control Þeld to mark the last BD of a chain. When the
CPM completes a chain, it ßags IDSR[DONE], triggering a maskable interrupt to the core.
The I bit (individual BD interrupt) behavior is independent of the L bitÑthe user may
disable individual BD interrupts (and/or mask them) for multi-buffer chains.
20.3.5 IDMA CP Commands
The core issues the following IDMA commands to the CP:
¥ ÑThe CPM resets the IDMA internal state. The current BD pointer is
INIT IDMA
reset to the top of the BD table (IBASE).
¥ ÑThe CP terminates current IDMA transfers. IDSR[DONE] is set, and
STOP IDMA
the current BD is closed. If the destination is memory, the IDMA internal storage
buffer is transferred before termination, regardless of the source. If the destination
is a peripheral, the internal storage buffer is ßushed and the transfer terminated
without writing to the peripheral. At the next request, the next BD in the table is
processed.
See Section , ÒThe PowerPC core can issue commands to control communications via the
CP command register (CPCR). The CP commands handle special cases, such as initializing
or stopping a channel, and are protocol-dependent.,Ó for the mechanics of issuing CP
commands.
20.3.6 IDMA Channel Operation
An IDMA channel operation consists of the following eventsÑIDMA channel
initialization, data transfer, and block termination. In the initialization phase, the core loads
the global IDMA channel information into the IDMA parameter RAM, builds the IDMA
BD table, and starts the channel. In the transfer phase, the CPM accepts a transfer request,
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