Customizing Nios Ii Processor Designs - Altera Nios II User Manual

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Chapter 1: Introduction

Customizing Nios II Processor Designs

Using the Nios II hardware reference designs included in an Altera development kit,
you can prototype an application running on a board before building a custom
hardware platform.
Figure 1–1. Example of a Nios II Processor System
SDRAM
Memory
Flash
Memory
SRAM
Memory
If the prototype system adequately meets design requirements using an
Altera-provided reference design, you can copy the reference design and use it
without modification in the final hardware platform. Otherwise, you can customize
the Nios II processor system until it meets cost or performance requirements.
Customizing Nios II Processor Designs
In practice, most FPGA designs implement some extra logic in addition to the
processor system. Altera FPGAs provide flexibility to add features and enhance
performance of the Nios II processor system. You can also eliminate unnecessary
processor features and peripherals to fit the design in a smaller, lower-cost device.
Because the pins and logic resources in Altera devices are programmable, many
customizations are possible:
You can rearrange the pins on the chip to simplify the board design. For example,
you can move address and data pins for external SDRAM memory to any side of
the chip to shorten board traces.
You can use extra pins and logic resources on the chip for functions unrelated to
the processor. Extra resources can provide a few extra gates and registers as glue
logic for the board design; or extra resources can implement entire systems. For
example, a Nios II processor system consumes only 5% of a large Altera FPGA,
leaving the rest of the chip's resources available to implement other functions.
February 2014 Altera Corporation
JTAG connection
to software debugger
JTAG
Debug Module
Data
Nios II
Processor Core
Inst.
SDRAM
Controller
On-Chip ROM
Tristate bridge to
off-chip memory
TXD
UART
RXD
Timer1
Timer2
LCD Display Driver
Screen
Buttons,
General-Purpose I/O
LEDs, etc.
Ethernet
Ethernet Interface
MAC/PHY
Compact
CompactFlash
Interface
Nios II Processor Reference Handbook
1–3
LCD
Flash

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