Altera Nios II User Manual page 200

8–20
bltu
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31 30 29 28 27 26 25
A
Nios II Processor Reference Handbook
if ((unsigned) rA < (unsigned) rB)
then PC ← PC + 4 + σ (IMM16)
else PC ← PC + 4
bltu rA, rB, label
bltu r6, r7, top_of_loop
If (unsigned) rA < (unsigned) rB, then bltu transfers program control to the instruction at
label. In the instruction encoding, the offset given by IMM16 is treated as a signed number of
bytes relative to the instruction immediately following bltu. The two least-significant bits of
IMM16 are always zero, because instruction addresses must be word-aligned.
Misaligned destination address
I
A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit signed immediate value
24 23 22 21 20 19 18 17
B
branch if less than unsigned
16 15 14 13 12 11 10 9
IMM16
Chapter 8: Instruction Set Reference
Instruction Set Reference
8 7 6 5 4 3 2 1
0x36
February 2014 Altera Corporation
0