Altera Nios II User Manual page 13

Chapter 1: Introduction
Configurable Soft Processor Core Concepts
Custom Components
You can also create custom components and integrate them in Nios II processor
systems. For performance-critical systems that spend most CPU cycles executing a
specific section of code, it is a common technique to create a custom peripheral that
implements the same function in hardware. This approach offers a double
performance benefit: the hardware implementation is faster than software; and the
processor is free to perform other functions in parallel while the custom peripheral
operates on data.
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For information about creating custom components in Qsys, refer to the
Components
Custom Instructions
Like custom peripherals, custom instructions allow you to increase system
performance by augmenting the processor with custom hardware. You can achieve
significant performance improvements, often on the order of 10 to 100 times, by
implementing performance-critical operations in hardware using custom instruction
logic.
The custom logic is integrated into the Nios II processor's arithmetic logic unit (ALU).
Similar to native Nios II instructions, custom instruction logic can take values from up
to two source registers and optionally write back a result to a destination register.
Because the processor is implemented on reprogrammable Altera FPGAs, software
and hardware engineers can work together to iteratively optimize the hardware and
test the results of software running on hardware.
From the software perspective, custom instructions appear as machine-generated
assembly macros or C functions, so programmers do not need to understand
assembly language to use custom instructions.
Automated System Generation
Altera's Qsys system integration tools fully automate the process of configuring
processor features and generating a hardware design that you program in an Altera
device. The Qsys graphical user interface (GUI) enables you to configure Nios II
processor systems with any number of peripherals and memory interfaces. You can
create entire processor systems without performing any schematic or HDL design
entry. Qsys can also import HDL design files, providing an easy mechanism to
integrate custom logic in a Nios II processor system.
After system generation, you can download the design onto a board, and debug
software executing on the board. To the software developer, the processor architecture
of the design is set. Software development proceeds in the same manner as for
traditional, nonconfigurable processors.
February 2014 Altera Corporation
chapter in volume 1 of the Quartus II Handbook.
Creating Qsys
Nios II Processor Reference Handbook
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