Altera Nios II User Manual page 114

4–10
f
For further descriptions of exceptions, exception handling, and control registers, refer
to the
Interrupt Controller Interfaces
The Interrupt controller setting determines which of the following configurations is
implemented:
■ Internal interrupt controller
■ External interrupt controller (EIC) interface
The EIC interface is available only on the Nios II/f core.
1
When the EIC interface and shadow register sets are implemented on the Nios II core,
you must ensure that your software is built with the Nios II Embedded Design Suite
(EDS) version 9.0 or higher. Earlier versions have an implementation of the eret
instruction that is incompatible with shadow register sets.
f
For details about the EIC interface, refer to "Exception Processing" in the
Model
Shadow Register Sets
The Number of shadow register sets setting determines whether the Nios II core
implements shadow register sets. The Nios II core can be configured with up to 63
shadow register sets.
Shadow register sets are available only on the Nios II/f core.
1
When the EIC interface and shadow register sets are implemented on the Nios II core,
you must ensure that your software is built with the Nios II EDS version 9.0 or higher.
f
For details about shadow register sets, refer to "Registers" in the
chapter of the Nios II Processor Reference Handbook.
HardCopy Compatible
The HardCopy Compatible parameter determines whether the instantiated Nios II
core is compatible with HardCopy
allows you to migrate from an FPGA device to HardCopy device without any RTL
changes to the Nios II core. When HardCopy Compatible is on, any generated Nios II
core and JTAG debug module RAM blocks are not pre-initialized.
1
When Device family on the Qsys Project Settings tab is a HardCopy device,
HardCopy Compatible is automatically turned on and uneditable.
w
Altera no longer offers HardCopy structured ASIC products for new design starts.
Altera continues to support HardCopy for existing designs. Customers can find
product documentation for the HardCopy structured ASIC series in the Altera mature
devices product listing.
f
www.altera.com/devices/asic/asic-index.html
Nios II Processor Reference Handbook
Programming Model chapter of the Nios II Processor Reference Handbook.
chapter of the Nios II Processor Reference Handbook.
Chapter 4: Instantiating the Nios II Processor
®
devices without recompilation. This feature
Advanced Features Tab
Programming
Programming Model
February 2014 Altera Corporation