Document Revision History - Altera Nios II User Manual

3–62
Potential Unimplemented Instructions
Some Nios II processor cores do not support all instructions in hardware. In this case,
the processor generates an exception after issuing an unimplemented instruction.
Only the following instructions can generate an unimplemented instruction
exception:
■
mul
■
muli
■
mulxss
■
mulxsu
■
mulxuu
■
div
■
divu
■
initda
All other instructions are guaranteed not to generate an unimplemented instruction
exception.
An exception routine must exercise caution if it uses these instructions, because they
could generate another exception before the previous exception is properly handled.
Refer to
unimplemented instruction processing.

Document Revision History

Table 3–49. Document Revision History (Part 1 of 2)
Date Version
February 2014 13.1.0
May 2011 11.0.0
December 2010 10.1.0
July 2010 10.0.0
November 2009 9.1.0
March 2009 9.0.0
November 2008 8.1.0
May 2008 8.0.0
October 2007 7.2.0
Nios II Processor Reference Handbook
"Unimplemented Instruction" on page 3–41
Added information on ECC support.
■
Removed HardCopy information.
■
Removed references to SOPC Builder.
■
Added references to new Qsys system integration tool.
Maintenance release.
Maintenance release.
Added external interrupt controller interface information.
■
Added shadow register set information.
■
Maintenance release.
Maintenance release.
Added text to describe the MMU, MPU, and advanced exceptions.
Reworked text to refer to break and reset as exceptions.
■
Grouped exceptions, break, reset, and interrupts all under Exception Processing.
■
Added table showing all Nios II exceptions (by priority).
■
Removed "ctl" references to control registers.
■
Added jmpi instruction to tables.
■
Chapter 3: Programming Model
Document Revision History
for more information regarding
Changes
February 2014 Altera Corporation