Document Revision History - Altera Nios II User Manual

8–104
xori
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31 30 29 28 27 26 25
A

Document Revision History

Table 8–6. Document Revision History (Part 1 of 2)
Date Version
February 2014 13.1.0
May 2011 11.0.0
December 2010 10.1.0
July 2010 10.0.0
November 2009 9.1.0
March 2009 9.0.0
November 2008 8.1.0
May 2008 8.0.0
October 2007 7.2.0
May 2007 7.1.0
March 2007 7.0.0
November 2006 6.1.0
May 2006 6.0.0
October 2005 5.1.0
Nios II Processor Reference Handbook
rB ← rA ^ (0x0000 : IMM16)
xori rB, rA, IMM16
xori r6, r7, 100
Calculates the bitwise logical exclusive OR of rA and (0x0000 : IMM16) and stores the result in
rB.
None
I
A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit unsigned immediate value
24 23 22 21 20 19 18 17
B
Removed references to SOPC Builder.
Maintenance release.
Corrected comments delimiter (#) in instruction usage.
Corrected typographical error in cmpgei instruction type.
Added shadow register sets and external interrupt controller support, including rdprs and
wrprs instructions.
Backwards-compatible change to the eret instruction B field encoding.
Maintenance release.
Added MMU.
■
Added an Exceptions section to all instructions.
■
Added jmpi instruction.
Added table of contents to Introduction section.
■
Added Referenced Documents section.
■
Maintenance release.
Maintenance release.
Maintenance release.
Correction to the blt instruction.
■
Added U bit operation for break and trap instructions.
■
bitwise logical exclusive or immediate
16 15 14 13 12 11 10 9
IMM16
Changes
Chapter 8: Instruction Set Reference
Document Revision History
8 7 6 5 4 3 2 1
0x1c
February 2014 Altera Corporation
0