Altera Nios II User Manual page 67

Chapter 3: Programming Model
Registers
Table 3–34. sstatus Control Register Field Descriptions (Part 2 of 2)
Bit
PIE
Notes:
(1) Refer to Table 3–8 on page
(2) If the EIC interface and shadow register sets are not present, SRS always reads as 0, and the processor behaves accordingly.
The sstatus register is present in the Nios II core if both the EIC interface and shadow
register sets are implemented. There is one copy of sstatus for each shadow register
set.
When the Nios II processor takes an interrupt, if a shadow register set is requested
(RRS = 0) and the MMU is not in exception handler mode (status.EH = 0), the
processor copies status to sstatus.
f
For details about RRS, refer to
about status.EH, refer to
Changing Register Sets
Modifying status.CRS immediately switches the Nios II processor to another register
set. However, software cannot write to status.CRS directly. To modify status.CRS,
insert the desired value into the saved copy of the status register, and then execute
the eret instruction, as follows:
■ If the processor is currently running in the normal register set, insert the new
register set number in estatus.CRS, and execute eret.
If the processor is currently running in a shadow register set, insert the new
■
register set number in sstatus.CRS, and execute eret.
Before executing eret to change the register set, system software must set individual
external interrupt masks correctly to ensure that registers in the shadow register set
cannot be corrupted. If an interrupt is assigned to the register set, system software
must ensure that one of the following conditions is true:
The ISR is written to preserve register contents.
■
The individual interrupt is disabled. The method for disabling an individual
■
external interrupt is specific to the EIC implementation.
Stacks and Shadow Register Sets
Depending on system requirements, the system software can create a dedicated stack
for each register set, or share a stack among several register sets. If a stack is shared,
the system software must copy the stack pointer each time the register set changes.
Use the rdprs instruction to copy the stack register between the current register set
and another register set.
Initialization with Shadow Register Sets
At initialization, system software must carry out the following tasks to ensure correct
software functioning with shadow register sets:
After the gp register is initialized in the normal register set, copy it to all shadow
■
register sets, to ensure that all code can correctly address the small data sections.
February 2014 Altera Corporation
Description
(1)
3–12.
Table 3–37 on page
Access
Read/Write
"Requested Register Set" on page
3–48.
3–27
Reset Available
Undefined (1)
3–38. For details
Nios II Processor Reference Handbook