Altera Nios II User Manual page 87

Chapter 3: Programming Model
Exception Processing
Exception Flow with the Internal Interrupt Controller
A general exception handler determines which of the pending interrupts has the
highest priority, and then transfers control to the appropriate ISR. The ISR stops the
interrupt from being visible (either by clearing it at the source or masking it using
ienable) before returning and/or before re-enabling PIE. The ISR also saves estatus
and ea (r29) before re-enabling PIE.
Interrupts can be re-enabled by writing one to the PIE bit, thereby allowing the
current ISR to be interrupted. Typically, the exception routine adjusts ienable so that
IRQs of equal or lower priority are disabled before re-enabling interrupts. Refer to
"Handling Nested Exceptions" on page 3–50
February 2014 Altera Corporation
for more information.
Nios II Processor Reference Handbook
3–47