Altera Nios II User Manual page 23

Chapter 2: Processor Architecture
Arithmetic Logic Unit
■ Multiply
■ Divide
Square root
■
■ Comparison
■ Integer conversion
■ Minimum
■ Maximum
Negate
■
■ Absolute
Other floating-point operations (including double-precision operations) are
implemented with software emulation. The component requires the following device
resources:
~2,500 4-input LEs
■
9 x 9 bit multipliers
■
■ 3x M9K memories
In the following table, a and b are assumed to be single-precision floating-point
values.
Table 2–3. Floating Point Custom Instruction 2 Operation Summary (Part 1 of 2)
Operation (1) N
fdivs 255
fsubs 254
fadds 253
fmuls 252
fsqrts 251
floatis 250
fixsi 249
round 248
Reserved 234 to 247
fmins 233
fmaxs 232
fcmplts 231
fcmples 230
fcmpgts 229
fcmpges 228
fcmpeqs 227
fcmpnes 226
February 2014 Altera Corporation
Cycles (3) Result
÷
16 a b
5 a – b
5 a + b
×
4 a b
8
a
4 int_to_float(a)
2 float_to_int(a)
2 float_to_int(a)
Undefined Undefined
1 (a < b) ? a : b
1 (a < b) ? b : a
1 (a < b) ? 1 : 0
≤
1 (a b) ? 1 : 0
1 (a > b) ? 1 : 0
≥
1 (a b) ? 1 : 0
1 (a = b) ? 1 : 0
≠
1 (a b) ? 1 : 0
Subnormal Rounding
Flush to 0 Nearest
Flush to 0 Faithful
Flush to 0 Faithful
Flush to 0 Faithful
Flush to 0 Faithful
Not applicable Not applicable
Flush to 0 Truncation
Flush to 0 Nearest
Supported None
Supported None
Supported None
Supported None
Supported None
Supported None
Supported None
Supported None
Nios II Processor Reference Handbook
2–7
GCC Inference
a / b
a – b
a + b
a * b
sqrtf() (4)
Casting
Casting
lroundf() (4)
fminf()
(4)
fmaxf()
(4)
a < b
a <= b
a > b
a >= b
a == b
a != b