Altera Nios II User Manual page 106

4–2
Table 4–1. Core Nios II Tab Parameters (Part 2 of 2)
Include MMU
Fast TLB Miss Exception vector
memory
Fast TLB Miss Exception vector
offset
Fast TLB Miss Exception vector
Include MPU
The following sections describe the configuration settings available.
Core Selection
The main purpose of the Core Nios II tab is to select the processor core. The core you
select on this tab affects other options available on this and other tabs.
Altera offers the following Nios II cores:
■ Nios II/f—The Nios II/f fast core is designed for fast performance. As a result, this
core presents the most configuration options allowing you to fine tune the
processor for performance.
■ Nios II/s—The Nios II/s standard core is designed for small size while
maintaining performance.
Nios II/e—The Nios II/e economy core is designed to achieve the smallest
■
possible core size. As a result, this core has a limited feature set, and many settings
are not available when the Nios II/e core is selected.
The Core Nios II tab displays a selector guide table that lists the basic properties of
each core.
f
For implementation information about each core, refer to the
Implementation Details
Multiply and Divide Settings
The Nios II/s and Nios II/f cores offer hardware multiply and divide options. You
can choose the best option to balance embedded multiplier usage, logic element (LE)
usage, and performance.
The Hardware multiplication type parameter for each core provides the following
list:
■ DSP Block—Include DSP block multipliers in the arithmetic logic unit (ALU).
This option is only selectable when targeting devices that have DSP block
multipliers.
Embedded Multipliers—Include embedded multipliers in the ALU. This option is
■
only present when targeting FPGA devices that have embedded multipliers.
Nios II Processor Reference Handbook
Name
MMU and MPU
Refer to
Refer to
chapter of the Nios II Processor Reference Handbook.
Chapter 4: Instantiating the Nios II Processor
Description
"Memory Management Unit Settings" on page
"Memory Protection Unit Settings" on page
Nios II Core
February 2014 Altera Corporation
Core Nios II Tab
4–4.
4–5.