Altera Nios II User Manual page 254

8–74
mulxuu
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31 30 29 28 27 26 25
A
Nios II Processor Reference Handbook
rC ← ((unsigned) rA) × ((unsigned) rB))
mulxuu rC, rA, rB
mulxuu r6, r7, r8
Treating rA and rB as unsigned integers, mulxuu multiplies rA times rB and stores the 32
high-order bits of the product to rC.
Nios II processors that do not implement the mulxuu instruction cause an unimplemented
instruction exception.
Use mulxuu and mul to compute the 64-bit product of two 32-bit unsigned integers.
Furthermore, mulxuu can be used as part of the calculation of a 128-bit product of two 64-bit
signed integers. Given two 64-bit signed integers, each contained in a pair of 32-bit registers,
(S1 : U1) and (S2 : U2), their 128-bit product is (U1 × U2) + ((S1 × U2) << 32) + ((U1 × S2) <<
32) + ((S1 × S2) << 64). The mulxuu and mul instructions are used to calculate the 64-bit
product U1 × U2.
mulxuu also can be used as part of the calculation of a 128-bit product of two 64-bit unsigned
integers. Given two 64-bit unsigned integers, each contained in a pair of 32-bit registers, (T1 :
U1) and (T2 : U2), their 128-bit product is (U1 × U2) + ((U1 × T2) << 32) + ((T1 × U2) << 32) +
((T1 × T2) << 64). The mulxuu and mul instructions are used to calculate the four 64-bit
products U1 × U2, U1 × T2, T1 × U2, and T1 × T2.
Unimplemented instruction
R
A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
24 23 22 21 20 19 18 17
B C
multiply extended unsigned/unsigned
63..32
16 15 14 13 12 11 10 9
0x07
Chapter 8: Instruction Set Reference
Instruction Set Reference
8 7 6 5 4 3 2 1
0 0x3a
February 2014 Altera Corporation
0