Altera Nios II User Manual page 121

Chapter 4: Instantiating the Nios II Processor
Custom Instruction Tab
Floating-Point Hardware Custom Instruction
The Nios II processor offers a set of optional predefined custom instructions that
implement floating-point arithmetic operations. You can include these custom
instructions to support computation-intensive floating-point applications.
The basic set of floating-point custom instructions includes single precision (32-bit)
floating-point addition, subtraction, and multiplication. Floating-point division is
available as an extension to the basic instruction set. The best choice for your
hardware design depends on a balance among floating-point usage, hardware
resource usage, and performance.
If the target device includes on-chip multiplier blocks, the floating-point custom
instructions incorporate them as needed. If there are no on-chip multiplier blocks, the
floating-point custom instructions are entirely based on general-purpose logic
elements.
1
The opcode extensions for the floating-point custom instructions are 252 through 255
(0xFC through 0xFF). These opcode extensions cannot be modified.
To add the floating-point custom instructions to the Nios II processor in Qsys, select
Floating Point Hardware under Custom Instruction Modules on the Component
Library tab, and click Add. By default, Qsys includes floating-point addition,
subtraction, and multiplication, but omit the more resource intensive floating-point
division. The Floating Point Hardware parameter editor appears, giving you the
option to include the floating-point division hardware.
Table 4–8. Floating Point Hardware Parameters
Name
Use floating point division hardware
Turn on Use floating point division hardware to include floating-point division
hardware. The floating-point division hardware requires more resources than the
other instructions, so you might wish to omit it if your application does not make
heavy use of floating-point division.
Click Finish to add the floating-point custom instructions to the Nios II processor.
f
For more information about the floating-point custom instructions, refer to the
Processor Architecture
Bitswap Custom Instruction
The Nios II processor core offers a bitswap custom instruction to reduce the time
spent performing bit reversal operations.
To add the bitswap custom instruction to the Nios II processor in Qsys, select Bitswap
under Custom Instruction Modules on the Component Library tab, and click Add.
The bitswap custom instruction reverses a 32-bit value in a single clock cycle. To
perform the equivalent operation in software requires many mask and shift
operations.
February 2014 Altera Corporation
Values
Parameters
On/Off Specifies inclusion of floating-point division hardware.
chapter of the Nios II Processor Reference Handbook.
Description
Nios II Processor Reference Handbook
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