Chapter 11 Fpga Internal Circuit; Overview; Fpga Peripheral Circuit Structure - Mitsubishi Electric NZ2GN2S-D41P01 User Manual

11
FPGA INTERNAL CIRCUIT
The circuit mounted on the FPGA of the factory default FPGA module is shown below.
11.1

Overview

The FPGA structure of the factory default FPGA module is shown below. The only block that needs development is the user
circuit block (uc2_top.v). Do not change the RTL of the standard circuit. If the standard circuit is modified, the operation of
various functions cannot be guaranteed.
DDR3L
DDR3L SDRAM I/F
SDRAM
Micro-
Microcomputer I/F
computer
Configuration data I/F
Configuration ROM
CLKIN
Oscillator
circuit

FPGA peripheral circuit structure

The FPGA connects one of the following to each connector (B0, B1, B2, E0, E1, E2). Change and use the connection inside
the FPGA for each connected circuit board.
• DC input/output circuit board
• Differential input/output circuit board
• Analog input/output circuit board
For details on the DC/differential input circuit, DC/differential output circuit, and ADC/DAC circuit, refer to the following.
Page 74 External Wiring
For details on the external terminals of the FPGA, refer to the following.
Page 651 A List of FPGA External Terminals
Top part (top1)
Standard
circuit
DDR3L SDRAM data
Microcomputer data
User circuit Standard
block circuit
B0 data
(uc2_top.v)
B1 data
B2 data
E0 data
E1 data
E2 data
11 FPGA INTERNAL CIRCUIT
11
B0 I/F Connector B0
B1 I/F Connector B1
B2 I/F B2
Connector
Connector
E0 I/F E0
E1 I/F
E1
E2 I/F E2
177
11.1 Overview