Transistor output wiring
This is the sink output type that the current flows into the output terminal when the output element (FET) is turned on.
There is a common terminal at intervals of four points. (Example: Y0 to Y3)
FPGA module
B0...2(E0...2) Board
Load
Y0
·
Load
Y3
COM
24VDC
Load
Y4
·
Load
Y7
COM
24VDC
Power supply
monitoring
Load
Y8
·
Load
YB
COM
24VDC
Load
YC
·
Load
YF
COM
24VDC
Q
D
Q
D
R T
R T
·
·
·
Q
D
Q
D
R T
R T
Q
D
Q
D
R T
R T
·
·
·
Q
D
Q
D
R T
R T
Q
D
Q
D
R T
R T
·
·
·
Q
D
Q
D
R T
R T
Q
D
Q
D
R T
R T
·
·
·
Q
D
Q
D
R T
R T
FPGA Board
Connector
FPGA
IOB0...2_Y0
(IOE0...2_Y0)
·
IOB0...2_Y3
(IOE0...2_Y3)
IOB0...2_Y4
(IOE0...2_Y4)
·
IOB0...2_Y7
(IOE0...2_Y7)
IOB0...2_RSTL
(IOE_RSTL)
IOB_DCDL
(IOE_DCDL)
IOB0...2_YCK0
(IOE0...2_YCK0)
IOB0...2_YCK1
(IOE0...2_YCK1)
7 INSTALLATION AND WIRING
77
7.5 External Wiring
7